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MC100E404FNR2G PDF预览

MC100E404FNR2G

更新时间： 2024-09-29 05:10:27
品牌 Logo 应用领域
安森美 - ONSEMI 栅极触发器逻辑集成电路
页数 文件大小 规格书
8页 129K
描述
5 V ECL Quad Differential AND/NAND

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中文翻译

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MC100E404FNR2G 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：QLCC
包装说明：QCCJ, LDCC28,.5SQ针数：28
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：16 weeks风险等级：5.57
Is Samacsys：N其他特性：NECL MODE: VCC = 0V WITH VEE = -4.2V TO -5.7V
系列：100EJESD-30 代码：S-PQCC-J28
JESD-609代码：e3长度：11.505 mm
逻辑集成电路类型：AND/NAND GATE功能数量：4
输入次数：2端子数量：28
最高工作温度：85 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：QCCJ
封装等效代码：LDCC28,.5SQ封装形状：SQUARE
封装形式：CHIP CARRIER包装方法：TAPE AND REEL
峰值回流温度（摄氏度）：260电源：-4.5 V
最大电源电流（ICC）：146 mAProp。Delay @ Nom-Sup：0.73 ns
传播延迟（tpd）：0.725 ns认证状态：Not Qualified
施密特触发器：NO座面最大高度：4.57 mm
子类别：Gates最大供电电压 (Vsup)：5.7 V
最小供电电压 (Vsup)：4.2 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：ECL
温度等级：OTHER端子面层：Tin (Sn)
端子形式：J BEND端子节距：1.27 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：11.505 mmBase Number Matches：1

MC100E404FNR2G 数据手册

 浏览型号MC100E404FNR2G的Datasheet PDF文件第2页浏览型号MC100E404FNR2G的Datasheet PDF文件第3页浏览型号MC100E404FNR2G的Datasheet PDF文件第4页浏览型号MC100E404FNR2G的Datasheet PDF文件第5页浏览型号MC100E404FNR2G的Datasheet PDF文件第6页浏览型号MC100E404FNR2G的Datasheet PDF文件第7页 
MC10E404, MC100E404  
5 VꢀECL Quad Differential  
AND/NAND  
Description  
The MC10E404/100E404 is a 4-bit differential AND/NAND  
device. The differential operation of the device makes it ideal for pulse  
shaping applications where duty cycle skew is critical. Special design  
techniques were incorporated to minimize the skew between the upper  
and lower level gate inputs.  
http://onsemi.com  
Because a negative 2-input NAND function is equivalent to a  
2-input OR function, the differential inputs and outputs of the device  
also allow for its use as a fully differential 2 input OR/NOR function.  
The output RISE/FALL times of this device are significantly faster  
than most other standard ECLinPS™ devices resulting in an increased  
bandwidth.  
The differential inputs have clamp structures which will force the Q  
output of a gate in an open input condition to go to a LOW state. Thus,  
inputs of unused gates can be left open and will not affect the operation  
of the rest of the device. Note that the input clamp will take affect only  
PLCC−28  
FN SUFFIX  
CASE 776  
if both inputs fall 2.5 V below V  
The 100 Series contains temperature compensation.  
.
CC  
MARKING DIAGRAM*  
1 28  
Features  
• Differential D and Q  
• 700 ps Max. Propagation Delay  
• High Frequency Outputs  
MCxxxE404FNG  
AWLYYWW  
• PECL Mode Operating Range: V  
= 4.2 V to 5.7 V  
= 0 V  
CC  
with V = 0 V  
EE  
• NECL Mode Operating Range: V  
CC  
xxx  
= 10 or 100  
with V = −4.2 V to −5.7 V  
A
= Assembly Location  
= Wafer Lot  
= Year  
= Work Week  
= Pb−Free Package  
EE  
WL  
YY  
WW  
G
• Internal Input 50 kW Pulldown Resistors  
• ESD Protection: Human Body Model; > 2 kV,  
Machine Model; > 200 V  
Charged Device Model; > 2 kV  
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test  
• Moisture Sensitivity Level:  
*For additional marking information, refer to  
Application Note AND8002/D.  
Pb = 1  
Pb−Free = 3  
ORDERING INFORMATION  
See detailed ordering and shipping information in the package  
dimensions section on page 6 of this data sheet.  
For Additional Information, see Application Note AND8003/D  
• Flammability Rating: UL 94 V−0 @ 0.125 in,  
Oxygen Index: 28 to 34  
• Transistor Count = 274 devices  
• Pb−Free Packages are Available*  
*For additional information on our Pb−Free strategy and soldering details, please  
download the ON Semiconductor Soldering and Mounting Techniques  
Reference Manual, SOLDERRM/D.  
©
Semiconductor Components Industries, LLC, 2006  
1
Publication Order Number:  
November, 2006 − Rev. 8  
MC10E404/D  
12345678

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MC100E404FNR2G 替代型号

型号 品牌 替代类型 描述 数据表
MC100E404FNR2 ONSEMI

完全替代

 QUAD DIFFERENTIAL AND/NAND
MC100E404FNG ONSEMI

完全替代

 5 V ECL Quad Differential AND/NAND
MC100E404FN ONSEMI

完全替代

 5 V ECL Quad Differential AND/NAND

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