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MC-4516CB64PS-A10B PDF预览

MC-4516CB64PS-A10B

更新时间: 2024-01-30 07:44:35
品牌 Logo 应用领域
日电电子 - NEC /
页数 文件大小 规格书
16页 130K
描述
16 M-WORD BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULE SO DIMM

MC-4516CB64PS-A10B 技术参数

生命周期:Transferred包装说明:DIMM, DIMM144,32
Reach Compliance Code:unknown风险等级:5.84
最长访问时间:7 ns最大时钟频率 (fCLK):100 MHz
I/O 类型:COMMONJESD-30 代码:R-PDMA-N144
内存密度:1073741824 bit内存集成电路类型:SYNCHRONOUS DRAM MODULE
内存宽度:64端子数量:144
字数:16777216 words字数代码:16000000
最高工作温度:70 °C最低工作温度:
组织:16MX64输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:DIMM
封装等效代码:DIMM144,32封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY电源:3.3 V
认证状态:Not Qualified刷新周期:4096
最大待机电流:0.008 A子类别:DRAMs
最大压摆率:1.76 mA标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子节距:0.8 mm端子位置:DUAL

MC-4516CB64PS-A10B 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
MC-4516CB64ES, 4516CB64PS  
16 M-WORD BY 64-BIT  
SYNCHRONOUS DYNAMIC RAM MODULE (SO DIMM)  
Description  
The MC-4516CB64ES and MC-4516CB64PS are 16,777,216 words by 64 bits synchronous dynamic RAM module  
(Small Outline DIMM) on which 8 pieces of 128 M SDRAM: µPD45128841 are assembled.  
These modules provide high density and large quantities of memory in a small space without utilizing the surface-  
mounting technology on the printed circuit board.  
Decoupling capacitors are mounted on power supply line for noise reduction.  
Features  
16,777,216 words by 64 bits organization  
Clock frequency and access time from CLK  
Part number  
/CAS Latency  
CL = 3  
Clock frequency (MAX.)  
100 MHz  
Access time from CLK (MAX.)  
MC-4516CB64ES-A10B  
7 ns  
8 ns  
7 ns  
8 ns  
CL = 2  
67 MHz  
MC-4516CB64PS-A10B  
CL = 3  
100 MHz  
CL = 2  
67 MHz  
Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge  
Pulsed interface  
Possible to assert random column address in every cycle  
Quad internal banks controlled by BA0 and BA1 (Bank Select)  
Programmable burst-length (1, 2, 4, 8 and Full Page)  
Programmable wrap sequence (Sequential / Interleave)  
Programmable /CAS latency (2, 3)  
Automatic precharge and controlled precharge  
CBR (Auto) refresh and self refresh  
Single +3.3 V ± 0.3 V power supply  
LVTTL compatible  
4,096 refresh cycles/64 ms  
Burst termination by Burst Stop command and Precharge command  
144-pin small outline dual in-line memory module (Pin pitch = 0.8 mm)  
Unbuffered type  
Serial PD  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
The mark shows major revised points.  
Document No. M13611EJ5V0DS00 (5th edition)  
Date Published February 2000 NS CP (K)  
Printed in Japan  
1998  
©

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