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MBM29SL160TD-12PBT PDF预览

MBM29SL160TD-12PBT

更新时间: 2024-09-14 22:08:23
品牌 Logo 应用领域
富士通 - FUJITSU /
页数 文件大小 规格书
61页 675K
描述
16M (2M x 8/1M x 16) BIT

MBM29SL160TD-12PBT 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:PLASTIC, FBGA-48Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.32.00.51
风险等级:5.92最长访问时间:120 ns
其他特性:CAN BE ORGANIZED AS 1M X 16备用内存宽度:8
启动块:TOP命令用户界面:YES
通用闪存接口:YES数据轮询:YES
JESD-30 代码:R-PBGA-B48JESD-609代码:e0
长度:9 mm内存密度:16777216 bit
内存集成电路类型:FLASH内存宽度:8
功能数量:1部门数/规模:8,31
端子数量:48字数:2097152 words
字数代码:2000000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:2MX8封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装等效代码:BGA48,6X8,32
封装形状:RECTANGULAR封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:2 V编程电压:1.8 V
认证状态:Not Qualified就绪/忙碌:YES
座面最大高度:1.2 mm部门规模:8K,64K
最大待机电流:0.000005 A子类别:Flash Memories
最大压摆率:0.025 mA最大供电电压 (Vsup):2.2 V
最小供电电压 (Vsup):1.8 V标称供电电压 (Vsup):2 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
切换位:YES类型:NOR TYPE
宽度:8 mm

MBM29SL160TD-12PBT 数据手册

 浏览型号MBM29SL160TD-12PBT的Datasheet PDF文件第2页浏览型号MBM29SL160TD-12PBT的Datasheet PDF文件第3页浏览型号MBM29SL160TD-12PBT的Datasheet PDF文件第4页浏览型号MBM29SL160TD-12PBT的Datasheet PDF文件第5页浏览型号MBM29SL160TD-12PBT的Datasheet PDF文件第6页浏览型号MBM29SL160TD-12PBT的Datasheet PDF文件第7页 
FUJITSU SEMICONDUCTOR  
DATA SHEET  
DS05-20877-1E  
FLASH MEMORY  
CMOS  
16M (2M × 8/1M × 16) BIT  
MBM29SL160TD-10/-12/MBM29SL160BD-10/-12  
FEATURES  
• Single 1.8 V read, program, and erase  
Minimizes system level power requirements  
• Compatible with JEDEC-standard commands  
Uses same software commands as E2PROMs  
• Compatible with JEDEC-standard world-wide pinouts  
48-pin TSOP(I) (Package suffix: PFTN – Normal Bend Type, PFTR – Reversed Bend Type)  
48-ball FBGA (Package suffix: PBT)  
• Minimum 100,000 program/erase cycles  
• High performance  
100 ns maximum access time  
• Sector erase architecture  
Eight 4K word and thirty one 32K word sectors in word mode  
Eight 8K byte and thirty one 64K byte sectors in byte mode  
Any combination of sectors can be concurrently erased. Also supports full chip erase.  
• Boot Code Sector Architecture  
T = Top sector  
B = Bottom sector  
• One Time Protect (OTP) region  
256 Byte of OTP, accessible through a new “OTP Enable” command sequence  
Factory serialized and protected to provide a secure electronic serial number (ESN)  
• WP/ACC input pin  
At VIL, allows protection of boot sectors, regardless of sector protection/unprotection status  
At VIH, allows removal of boot sector protection  
At VHH, increases program performance  
• Embedded EraseTM Algorithms  
Automatically pre-programs and erases the chip or any sector  
• Embedded ProgramTM Algorithms  
Automatically writes and verifies data at specified address  
• Data Polling and Toggle Bit feature for detection of program or erase cycle completion  
• Ready/Busy output (RY/BY)  
Hardware method for detection of program or erase cycle completion  
(Continued)  
Embedded EraseTM and Embedded ProgramTM are trademarks of Advanced Micro Devices, Inc.  

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