MACH435-12

更新时间： 2024-10-28 22:28:31

品牌	Logo	应用领域
莱迪思 - LATTICE		可编程逻辑
页数	文件大小	规格书
30页	252K
描述
High-Density EE CMOS Programmable Logic

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MACH435-12 数据手册

FINAL

COM’L: -12/15/20, Q-20/25

Lattice Semiconductor

MACH435-12/15/20, Q-20/25

High-Density EE CMOS Programmable Logic

DISTINCTIVE CHARACTERISTICS

■ 84 Pins in PLCC

■ Flexible clocking

■ 128 Macrocells

— Four global clock pins with selectable edges

— Asynchronous mode available for each

macrocell

■ 12 ns tPD

■ 83.3 MHz fCNT

■ 8 “PAL33V16” blocks

■ 70 Inputs with pull-up resistors

■ 64 Outputs

■ Input and output switch matrices for high

routability

■ 192 Flip-flops

■ Fixed, predictable, deterministic delays

— 128 Macrocell flip-flops

— 64 Input flip-flops

■ Pin compatible with MACH130, MACH131,

MACH230, and MACH231

■ Up to 20 product terms per function, with XOR

GENERAL DESCRIPTION

TheMACH435isamemberofourhigh-performance

EE CMOS MACH 4 family. This device has approxi-

mately twelve times the macrocell capability of the

popular PAL22V10, with significant density and func-

tional features that the PAL22V10 does not provide.

together on the same device. The two types of design

can be mixed in any proportion, since the selection on

each macrocell affects only that macrocell.

Up to 20 product terms per function can be assigned. It

is possible to allocate some product terms away from a

macrocell without losing the use of that macrocell for

logic generation.

The MACH435 consists of eight PAL blocks intercon-

nected by a programmable central switch matrix. The

central switch matrix connects the PAL blocks to each

other and to all input pins, providing a high degree of

connectivity between the fully-connected PAL blocks.

This allows designs to be placed and routed efficiently.

Routability is further enhanced by an input switch matrix

and an output switch matrix. The input switch matrix

provides input signals with alternative paths into the

central switch matrix; the output switch matrix provides

flexibility in assigning macrocells to I/O pins.

The MACH435 macrocell provides either registered or

combinatorial outputs with programmable polarity. If a

registered configuration is chosen, the register can be

configured as D-type, T-type, J-K, or S-R to help reduce

the number of product terms used. The flip-flop can also

be configured as a latch. The register type decision can

be made by the designer or by the software.

All macrocells can be connected to an I/O cell through

the output switch matrix. The output switch matrix

makes it possible to make significant design changes

while minimizing the risk of pinout changes.

The MACH435 has macrocells that can be configured

assynchronousorasynchronous.Thisallowsdesigners

to implement both synchronous and asynchronous logic

Publication# 17469 Rev. E Amendment/0

Issue Date: May 1995

12 3 4 5 6 7...30

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与MACH435-12相关器件

型号	品牌	获取价格	描述	数据表
MACH435-12JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH435-15JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH435-20JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH435Q-20JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH435Q-25JC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH445-12	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH445-12YC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH445-15YC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH445-20YC	LATTICE	获取价格	High-Density EE CMOS Programmable Logic
MACH465-12YC	ROCHESTER	获取价格	EE PLD, 16ns, PQFP208, PLASTIC, QFP-208

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