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M74VHC1GT126DF1G

更新时间： 2024-02-11 10:54:16
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安森美 - ONSEMI 转换器电平转换器
页数 文件大小 规格书
6页 87K
描述
Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs

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中文翻译

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M74VHC1GT126DF1G 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOT-353
包装说明：TSSOP,针数：5
Reach Compliance Code：unknown风险等级：5.52
系列：AHC/VHC/H/U/VJESD-30 代码：R-PDSO-G5
JESD-609代码：e3长度：2 mm
逻辑集成电路类型：BUS DRIVER湿度敏感等级：NOT SPECIFIED
位数：1功能数量：1
端口数量：2端子数量：5
最高工作温度：125 °C最低工作温度：-55 °C
输出特性：3-STATE输出极性：TRUE
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：260传播延迟（tpd）：16 ns
认证状态：COMMERCIAL座面最大高度：1.1 mm
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：3 V
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：MATTE TIN端子形式：GULL WING
端子节距：0.65 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：1.25 mm
Base Number Matches：1

M74VHC1GT126DF1G 数据手册

 浏览型号M74VHC1GT126DF1G的Datasheet PDF文件第2页浏览型号M74VHC1GT126DF1G的Datasheet PDF文件第3页浏览型号M74VHC1GT126DF1G的Datasheet PDF文件第4页浏览型号M74VHC1GT126DF1G的Datasheet PDF文件第5页浏览型号M74VHC1GT126DF1G的Datasheet PDF文件第6页 
MC74VHC1GT126  
Noninverting Buffer /  
CMOS Logic Level Shifter  
with LSTTL−Compatible Inputs  
The MC74VHC1GT126 is a single gate noninverting 3−state buffer  
fabricated with silicon gate CMOS technology. It achieves high speed  
operation similar to equivalent Bipolar Schottky TTL while maintaining  
CMOS low power dissipation.  
The MC74VHC1GT126 requires the 3−state control input (OE) to be  
set Low to place the output into the high impedance state.  
http://onsemi.com  
MARKING  
DIAGRAMS  
The device input is compatible with TTL−type input thresholds and  
the output has a full 5 V CMOS level output swing. The input  
protection circuitry on this device allows overvoltage tolerance on the  
input, allowing the device to be used as a logic−level translator from  
3 V CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to  
3 V CMOS Logic while operating at the high−voltage power supply.  
The MC74VHC1GT126 input structure provides protection when  
voltages up to 7 V are applied, regardless of the supply voltage. This  
allows the MC74VHC1GT126 to be used to interface 5 V circuits to  
3 V circuits. The output structures also provide protection when  
5
5
1
W3 M G  
SC−88A/SOT−353/SC−70  
DF SUFFIX  
G
CASE 419A  
1
5
5
W3 M G  
G
1
TSOP−5/SOT−23/SC−59  
DT SUFFIX  
1
V
CC  
= 0 V. These input and output structures help prevent device  
destruction caused by supply voltage − input/output voltage mismatch,  
battery backup, hot insertion, etc.  
CASE 483  
Features  
W3 = Device Code  
• High Speed: t = 3.5 ns (Typ) at V = 5 V  
• Low Power Dissipation: I = 1 mA (Max) at T = 25°C  
• TTL−Compatible Inputs: V = 0.8 V; V = 2 V  
• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load  
PD  
CC  
M
G
= Date Code*  
= Pb−Free Package  
CC  
A
(Note: Microdot may be in either location)  
*Date Code orientation and/or position may vary  
depending upon manufacturing location.  
IL  
IH  
OH  
CC  
OL  
CC  
• Power Down Protection Provided on Inputs and Outputs  
• Balanced Propagation Delays  
• Pin and Function Compatible with Other Standard Logic Families  
• Chip Complexity: FETs = 62; Equivalent Gates = 16  
• Pb−Free Packages are Available  
PIN ASSIGNMENT  
1
2
3
4
5
OE  
IN A  
GND  
OUT Y  
V
CC  
OE  
IN A  
GND  
5
4
V
CC  
1
2
3
FUNCTION TABLE  
OE Input  
OUT Y  
A Input  
Y Output  
L
H
X
H
H
L
L
H
Z
Figure 1. Pinout (Top View)  
OE  
IN A  
OUT Y  
ORDERING INFORMATION  
Figure 2. Logic Symbol  
See detailed ordering and shipping information in the package  
dimensions section on page 4 of this data sheet.  
©
Semiconductor Components Industries, LLC, 2007  
1
Publication Order Number:  
February, 2007 − Rev. 13  
MC74VHC1GT126/D  
123456

中文翻译

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M74VHC1GT126DF1G 替代型号

型号 品牌 替代类型 描述 数据表
MC74VHC1GT126DF1G ONSEMI

完全替代

 AHC/VHC SERIES, 1-BIT DRIVER, TRUE OUTPUT, PDSO5, SC-70, SC-88A, SOT-353, 5 PIN
M74VHC1GT126DF2G ONSEMI

类似代替

 Noninverting Buffer / CMOS Logic Level Shifter with LSTTL−Compatible Inputs
MC74VHC1GT126DF1 ONSEMI

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 Noninverting Buffer / CMOS Logic Level Shifter

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