Datasheet > 逻辑 > 栅极> M74VHC1GT14DFT2G-L22038

M74VHC1GT14DFT2G-L22038

更新时间： 2024-11-05 11:01:47

品牌	Logo	应用领域
安森美 - ONSEMI		栅栅极
页数	文件大小	规格书
6页	79K
描述
Single Inverter with TTL Level Input, Schmitt Trigger Input

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M74VHC1GT14DFT2G-L22038 数据手册

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MC74VHC1GT14

Schmitt−Trigger Inverter /

CMOS Logic Level Shifter

LSTTL−Compatible Inputs

The MC74VHC1GT14 is a single gate CMOS Schmitt−trigger

inverter fabricated with silicon gate CMOS technology. It achieves

high speed operation similar to equivalent Bipolar Schottky TTL

while maintaining CMOS low power dissipation.

http://onsemi.com

MARKING

The internal circuit is composed of three stages, including a buffer

output which provides high noise immunity and stable output.

The device input is compatible with TTL−type input thresholds and

the output has a full 5 V CMOS level output swing. The input protection

circuitry on this device allows overvoltage tolerance on the input,

allowing the device to be used as a logic−level translator from 3 V

CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V

CMOS Logic while operating at the high−voltage power supply.

The MC74VHC1GT14 input structure provides protection when

voltages up to 7 V are applied, regardless of the supply voltage. This

allows the MC74VHC1GT14 to be used to interface 5 V circuits to 3 V

DIAGRAMS

VC M G

SC−88A/SC70−5/SOT−353

DF SUFFIX

CASE 419A

VC M G

circuits. The output structures also provide protection when V = 0 V.

These input and output structures help prevent device destruction

caused by supply voltage − input/output voltage mismatch, battery

backup, hot insertion, etc. The MC74VHC1GT14 can be used to

enhance noise immunity or to square up slowly changing waveforms.

TSOP−5/SOT23−5/SC59−5

DT SUFFIX

CASE 483

VC = Device Code

= Date Code*

= Pb−Free Package

Features

• High Speed: t = 4.5 ns (Typ) at V = 5 V

• Low Power Dissipation: I = 1 mA (Max) at T = 25°C

• TTL−Compatible Inputs: V = 0.8 V; V = 2 V

(Note: Microdot may be in either location)

*Date Code orientation and/or position may vary

depending upon manufacturing location.

• CMOS−Compatible Outputs: V > 0.8 V ; V < 0.1 V @Load

• Power Down Protection Provided on Inputs and Outputs

• Balanced Propagation Delays

• Pin and Function Compatible with Other Standard Logic Families

• Chip Complexity: FETs = 100; Equivalent Gates = 25

• Pb−Free Packages are Available

PIN ASSIGNMENT

IN A

GND

OUT Y

FUNCTION TABLE

IN A

A Input

Y Output

GND

OUT Y

Figure 1. Pinout (Top View)

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 4 of this data sheet.

IN A

OUT Y

Figure 2. Logic Symbol

Publication Order Number:

February, 2007 − Rev. 12

MC74VHC1GT14/D

12 3 4 5 6

中文翻译

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与M74VHC1GT14DFT2G-L22038相关器件

型号	品牌	获取价格	描述	数据表
M74VHC1GT14DTT1G	ONSEMI	获取价格	Schmitt−Trigger Inverter / CMOS Logic Level Shifter LSTTL−Compatible Inputs
M74VHC1GT32DFT1G	ONSEMI	获取价格	2−Input OR Gate/CMOS Logic Level Shifter
M74VHC1GT32DFT2G	ONSEMI	获取价格	2−Input OR Gate/CMOS Logic Level Shifter
M74VHC1GT32DTT1G	ONSEMI	获取价格	2−Input OR Gate/CMOS Logic Level Shifter
M74VHC1GT50DFT1G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs
M74VHC1GT50DFT2G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs
M74VHC1GT50DTT1G	ONSEMI	获取价格	Noninverting Buffer / CMOS Logic Level Shifter TTL−Compatible Inputs
M74VHC1GT66DFT1G	ONSEMI	获取价格	SPST (NO) Normally Open Analog Switch
M74VHC1GT66DFT2G	ONSEMI	获取价格	SPST (NO) Normally Open Analog Switch
M74VHC1GT66DTT1G	ONSEMI	获取价格	SPST (NO) Normally Open Analog Switch

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