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M74VHC594TTR PDF预览

M74VHC594TTR

更新时间: 2024-11-20 22:51:35
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 移位寄存器输出元件
页数 文件大小 规格书
14页 311K
描述
8 BIT SHIFT REGISTER WITH OUTPUT REGISTER

M74VHC594TTR 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP16,.25
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.85
计数方向:RIGHT系列:AHC/VHC/H/U/V
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:5 mm逻辑集成电路类型:SERIAL IN PARALLEL OUT
最大频率@ Nom-Sup:95000000 Hz位数:8
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源:2/5.5 V传播延迟(tpd):13.9 ns
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Shift Registers最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL触发器类型:POSITIVE EDGE
宽度:4.4 mm最小 fmax:115 MHz
Base Number Matches:1

M74VHC594TTR 数据手册

 浏览型号M74VHC594TTR的Datasheet PDF文件第2页浏览型号M74VHC594TTR的Datasheet PDF文件第3页浏览型号M74VHC594TTR的Datasheet PDF文件第4页浏览型号M74VHC594TTR的Datasheet PDF文件第5页浏览型号M74VHC594TTR的Datasheet PDF文件第6页浏览型号M74VHC594TTR的Datasheet PDF文件第7页 
74VHC594  
8 BIT SHIFT REGISTER  
WITH OUTPUT REGISTER  
HIGH SPEED: t = 4.2ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4 µA (MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28% V (MIN.)  
V
NIH  
NIL  
CC  
POWER DOWN PROTECTION ON INPUTS  
SYMMETRICAL OUTPUT IMPEDANCE:  
SOP  
TSSOP  
T & R  
|I | = I = 8 mA (MIN)  
OH  
OL  
Table 1: Order Codes  
PACKAGE  
BALANCED PROPAGATION DELAYS:  
t
t
PLH  
PHL  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 5.5V  
SOP  
M74VHC594RMTR  
M74VHC594TTR  
V
CC  
TSSOP  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 594  
A serial (QH’) output is provided for cascading  
purposes. Both the shift register and storage  
register use positive-edge triggered clocks. If the  
clocks are connected together, the shift register  
state will always be one clock pulse ahead of the  
storage register.  
Power down protection is provided on all inputs  
and 0 to 7V can be accepted on inputs with no  
regard to the supply voltage. This device can be  
used to interface 5V to 3V.  
IMPROVED LATCH-UP IMMUNITY  
LOW NOISE: V  
= 0.8V (MAX.)  
OLP  
DESCRIPTION  
The 74VHC594 is an high speed CMOS 8-BIT  
SHIFT REGISTERS fabricated with sub-micron  
silicon gate C MOS technology.  
This device contains an 8-bit serial-in, parallel-out  
shift register that feeds an 8-bit D-type storage  
register. Separate clocks and direct overriding  
clear (SCLR, RCLR) are provided for both the shift  
register and the storage register.  
2
All inputs are equipped with protection circuits  
against static discharge, giving them 2KV ESD  
immunity and transient excess voltage.  
Figure 1: Pin Connection And IEC Logic Symbols  
Rev. 5  
1/14  
November 2004  

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