Datasheet > M74HC74-1

M74HC74-1

更新时间： 2024-11-01 22:57:55

品牌	Logo	应用领域
意法半导体 - STMICROELECTRONICS		触发器
页数	文件大小	规格书
12页	456K
描述
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

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中文翻译

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数据手册

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M74HC74-1 数据手册

M74HC74

DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

■

HIGH SPEED :

= 67MHz (TYP.) at V = 6V

MAX

LOW POWER DISSIPATION:

=2µA(MAX.) at T =25°C

HIGH NOISE IMMUNITY:

= V = 28 % V (MIN.)

NIH

NIL

DIP

SOP

TSSOP

T & R

SYMMETRICAL OUTPUT IMPEDANCE:

|I | = I = 4mA (MIN)

BALANCED PROPAGATION DELAYS:

ORDER CODES

PACKAGE

PLH

PHL

WIDE OPERATING VOLTAGE RANGE:

(OPR) = 2V to 6V

TUBE

DIP

SOP

M74HC74B1R

M74HC74M1R

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 74

M74HC74RM13TR

M74HC74TTR

TSSOP

DESCRIPTION

The M74HC74 is an high speed CMOS DUAL D

TYPE FLIP FLOP WITH CLEAR fabricated with

silicon gate C MOS technology.

A signal on the D INPUT is transferred on the Q

OUTPUT during the positive going transition of the

clock pulse. CLEAR and PRESET are

independent of the clock and accomplished by a

low on the appropriate input.

All inputs are equipped with protection circuits

against static discharge and transient excess

voltage.

PIN CONNECTION AND IEC LOGIC SYMBOLS

July 2001

1/12

12 3 4 5 6 7...12

中文翻译

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与M74HC74-1相关器件

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M74HC74B1	STMICROELECTRONICS	获取价格	DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
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M74HC74B1R	STMICROELECTRONICS	获取价格	DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
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