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M74HC4022 PDF预览

M74HC4022

更新时间: 2024-11-04 22:57:55
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS /
页数 文件大小 规格书
12页 258K
描述
OCTAL COUNTER/DIVIDER

M74HC4022 数据手册

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M54HC4022  
M74HC4022  
OCTAL COUNTER/DIVIDER  
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HIGH SPEED  
fMAX = 57 MHz (TYP.) at VCC = 5 V  
LOW POWER DISSIPATION  
ICC 4 µA (MAX.) at TA = 25 °C  
HIGH NOISE IMMUNITY  
VNIH = VNIL = 28 % VCC (MIN.)  
OUTPUT DRIVE CAPABILITY  
10 LSTTL LOADS  
SYMMETRICAL OUTPUT IMPEDANCE  
|IOH| = IOL = 4 mA (MIN.)  
BALANCED PROPAGATION DELAYS  
tPLH = tPHL  
WIDE OPERATING VOLTAGE RANGE  
B1R  
(Plastic Package)  
F1R  
(Ceramic Package)  
M1R  
(Micro Package)  
C1R  
(Chip Carrier)  
VCC (OPR) = 2 V to 6 V  
PIN AND FUNCTION COMPATIBLE  
WITH 4022B  
ORDER CODES :  
M54HC4022F1R  
M74HC4022B1R  
M74HC4022M1R  
M74HC4022C1R  
PIN CONNECTIONS (top view)  
DESCRIPTION  
The M54/74HC4022 isa high speed CMOSOCTAL  
COUNTER/DIVIDER fabricated in silicon gate  
C2MOS technology.  
It has the same high speed performance of LSTTL  
combined with true CMOS low power consumption.  
It contains a 4-stage divide-by-8 Johnson counter  
with 8 decoded outputs (Q0-Q7) and a Carry-out bit.  
This counter is advanced on the positive edge of the  
clock signal when CLOCK ENABLE input is held  
low, or is advanced on the negative edge of clock  
enable signal when CLOCK input is held high, and  
the selected one of eight outputs goes high.Holding  
the CLEAR input high clears the counter to zero re-  
gardless of the other input conditions. All inputs are  
equipped with protection circuits against static dis-  
charge and transient excess voltage.  
NC =  
No Internal  
Connection  
October 1992  
1/12  

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