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LY622568LL

更新时间: 2024-02-28 05:44:51
品牌 Logo 应用领域
台湾来扬 - LYONTEK 静态存储器
页数 文件大小 规格书
14页 217K
描述
256K X 8 BIT LOW POWER CMOS SRAM

LY622568LL 技术参数

生命周期:Not Recommended包装说明:,
Reach Compliance Code:compliant风险等级:5.8
Is Samacsys:NBase Number Matches:1

LY622568LL 数据手册

 浏览型号LY622568LL的Datasheet PDF文件第2页浏览型号LY622568LL的Datasheet PDF文件第3页浏览型号LY622568LL的Datasheet PDF文件第4页浏览型号LY622568LL的Datasheet PDF文件第6页浏览型号LY622568LL的Datasheet PDF文件第7页浏览型号LY622568LL的Datasheet PDF文件第8页 
®
LY622568  
256K X 8 BIT LOW POWER CMOS SRAM  
Rev. 2.2  
CAPACITANCE (TA = 25, f = 1.0MHz)  
PARAMETER  
Input Capacitance  
Input/Output Capacitance  
SYMBOL  
MIN.  
-
-
MAX  
6
8
UNIT  
pF  
pF  
CIN  
CI/O  
Note : These parameters are guaranteed by device characterization, but not production tested.  
AC TEST CONDITIONS  
Input Pulse Levels  
0.2V to VCC - 0.2V  
Input Rise and Fall Times  
Input and Output Timing Reference Levels  
Output Load  
3ns  
1.5V  
CL = 30pF + 1TTL, IOH/IOL = -2mA/4mA  
AC ELECTRICAL CHARACTERISTICS  
(1) READ CYCLE  
PARAMETER  
SYM.  
tRC  
UNIT  
LY622568-45  
LY622568-55  
LY622568-70  
MIN.  
MAX.  
MIN.  
MAX.  
MIN.  
MAX.  
Read Cycle Time  
Address Access Time  
Chip Enable Access Time  
Output Enable Access Time  
Chip Enable to Output in Low-Z  
Output Enable to Output in Low-Z  
Chip Disable to Output in High-Z  
Output Disable to Output in High-Z  
Output Hold from Address Change  
45  
-
-
-
10  
5
-
55  
-
-
-
10  
5
-
70  
-
-
-
10  
5
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tAA  
45  
45  
25  
-
55  
55  
30  
-
70  
70  
35  
-
tACE  
tOE  
tCLZ  
tOLZ  
tCHZ  
tOHZ  
tOH  
*
*
*
*
-
-
-
-
-
10  
15  
15  
-
-
-
10  
20  
20  
-
-
-
10  
25  
25  
-
(2) WRITE CYCLE  
PARAMETER  
SYM.  
tWC  
tAW  
tCW  
tAS  
UNIT  
LY622568-45  
LY622568-55  
LY622568-70  
MIN.  
45  
40  
40  
0
MAX.  
MIN.  
55  
50  
50  
0
MAX.  
MIN.  
70  
60  
60  
0
MAX.  
Write Cycle Time  
-
-
-
-
-
-
-
-
-
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Valid to End of Write  
Chip Enable to End of Write  
Address Set-up Time  
Write Pulse Width  
Write Recovery Time  
Data to Write Time Overlap  
Data Hold from End of Write Time  
Output Active from End of Write  
Write to Output in High-Z  
-
-
-
tWP  
tWR  
tDW  
tDH  
tOW  
35  
0
-
-
45  
0
-
-
55  
0
-
-
20  
0
-
-
25  
0
-
-
30  
0
-
-
*
5
-
5
-
5
-
tWHZ  
*
-
15  
-
20  
-
25  
*These parameters are guaranteed by device characterization, but not production tested.  
Lyontek Inc. reserves the rights to change the specifications and products without notice.  
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.  
TEL: 886-3-6668838  
FAX: 886-3-6668836  
4

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