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LP2997MR/NOPB PDF预览

LP2997MR/NOPB

更新时间: 2024-09-13 19:50:11
品牌 Logo 应用领域
美国国家半导体 - NSC 光电二极管接口集成电路
页数 文件大小 规格书
12页 610K
描述
IC BUS TERMINATOR SUPPORT CIRCUIT, PDSO8, PSOP-8, Bus Terminator

LP2997MR/NOPB 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:HLSOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.03接口集成电路类型:BUS TERMINATOR SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G8JESD-609代码:e3
长度:4.93 mm湿度敏感等级:3
功能数量:1端子数量:8
最高工作温度:125 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:HLSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.68 mm最大供电电压:5.5 V
最小供电电压:2.2 V标称供电电压:2.5 V
电源电压1-最大:1.9 V电源电压1-分钟:1.7 V
电源电压1-Nom:1.8 V表面贴装:YES
温度等级:OTHER端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.94 mmBase Number Matches:1

LP2997MR/NOPB 数据手册

 浏览型号LP2997MR/NOPB的Datasheet PDF文件第2页浏览型号LP2997MR/NOPB的Datasheet PDF文件第3页浏览型号LP2997MR/NOPB的Datasheet PDF文件第4页浏览型号LP2997MR/NOPB的Datasheet PDF文件第5页浏览型号LP2997MR/NOPB的Datasheet PDF文件第6页浏览型号LP2997MR/NOPB的Datasheet PDF文件第7页 
June 2006  
LP2997  
DDR-II Termination Regulator  
General Description  
Features  
n Source and sink current  
n Low output voltage offset  
n No external resistors required  
n Linear topology  
The LP2997 linear regulator is designed to meet the JEDEC  
SSTL-18 specifications for termination of DDR-II memory.  
The device contains a high-speed operational amplifier to  
provide excellent response to load transients. The output  
stage prevents shoot through while delivering 500mA con-  
tinuous current and transient peaks up to 900mA in the  
application as required for DDR-II SDRAM termination. The  
LP2997 also incorporates a VSENSE pin to provide superior  
load regulation and a VREF output as a reference for the  
chipset and DIMMs.  
n Suspend to Ram (STR) functionality  
n Low external component count  
n Thermal Shutdown  
n Available in SO-8, PSOP-8 packages  
Applications  
An additional feature found on the LP2997 is an active low  
shutdown (SD) pin that provides Suspend To RAM (STR)  
functionality. When SD is pulled low the VTT output will  
tri-state providing a high impedance output, but, VREF will  
remain active. A power savings advantage can be obtained  
in this mode through lower quiescent current.  
n DDR-II Termination Voltage  
n SSTL-18 Termination  
Typical Application Circuit  
20109418  
© 2006 National Semiconductor Corporation  
DS201094  
www.national.com  

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