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LP2998QMRE/NOPB PDF预览

LP2998QMRE/NOPB

更新时间: 2024-11-24 11:14:47
品牌 Logo 应用领域
德州仪器 - TI 双倍数据速率光电二极管接口集成电路稳压器
页数 文件大小 规格书
37页 2390K
描述
用于汽车应用的 DDR 终端稳压器 | DDA | 8 | -40 to 125

LP2998QMRE/NOPB 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HLSOP,
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.78差分输出:NO
接口集成电路类型:OTHER TERMINATORJESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.89 mm
湿度敏感等级:3最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HLSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, LOW PROFILE峰值回流温度(摄氏度):260
筛选级别:AEC-Q100座面最大高度:1.7 mm
最大供电电压:5.5 V最小供电电压:2.2 V
标称供电电压:2.5 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

LP2998QMRE/NOPB 数据手册

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LP2998, LP2998-Q1  
SNVS521K DECEMBER 2007REVISED AUGUST 2014  
LP2998/LP2998-Q1 DDR Termination Regulator  
1 Features  
3 Description  
The LP2998 linear regulator is designed to meet  
1
AEC-Q100 Test Guidance with the following  
results (SO PowerPAD-8):  
JEDEC SSTL-2 and JEDEC SSTL-18 specifications  
for termination of DDR-SDRAM and DDR2 memory.  
The device also supports DDR3 and DDR3L VTT bus  
termination with VDDQ min of 1.35 V. The device  
contains a high-speed operational amplifier to provide  
excellent response to load transients. The output  
stage prevents shoot through while delivering 1.5 A  
continuous current and transient peaks up to 3 A in  
the application as required for DDR-SDRAM  
Device HBM ESD Classification Level H1C  
Junction Temperature Range –40°C to 125°C  
1.35 V Minimum VDDQ  
Source and Sink Current  
Low Output Voltage Offset  
No External Resistors Required  
Linear Topology  
termination. The LP2998 also incorporates  
a
VSENSE pin to provide superior load regulation and  
a VREF output as a reference for the chipset and  
DIMMs.  
Suspend to Ram (STR) Functionality  
Low External Component Count  
Thermal Shutdown  
An additional feature found on the LP2998 is an  
active low shutdown (SD) pin that provides Suspend  
To RAM (STR) functionality. When SD is pulled low  
2 Applications  
the VTT output will tri-state providing  
a
high  
DDR1, DDR2, DDR3, and DDR3L Termination  
Voltage  
impedance output, but, VREF will remain active. A  
power savings advantage can be obtained in this  
mode through lower quiescent current.  
Automotive Infotainment  
FPGA  
Device Information(1)  
Industrial/Medical PC  
SSTL-18, SSTL-2, and SSTL-3 Termination  
HSTL Termination  
PART NUMBER  
LP2998  
PACKAGE  
SO PowerPAD™ (8) 4.89 mm x 3.90 mm  
SOIC (8) 4.90 mm x 3.91 mm  
SO PowerPAD™ (8) 4.89 mm x 3.90 mm  
BODY SIZE (NOM)  
LP2998  
LP2998-Q1  
(1) For all available packages, see the orderable addendum at  
the end of the datasheet.  
4 Simplified Schematic  
LP2998  
V
= 0.75V  
REF  
V
REF  
SD  
V
SD  
+
+
C
REF  
V
= 1.5V  
= 2.5V  
DDQ  
DDQ  
V
DD  
AV  
IN  
PV  
IN  
V
SENSE  
V
TT  
= 0.75V  
V
TT  
+
GND  
C
C
OUT  
IN  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 
 
 
 

LP2998QMRE/NOPB 替代型号

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完全替代

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