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KMM466S424DT-G0 PDF预览

KMM466S424DT-G0

更新时间: 2024-11-22 06:59:27
品牌 Logo 应用领域
三星 - SAMSUNG 动态存储器
页数 文件大小 规格书
10页 172K
描述
Synchronous DRAM Module, 4MX64, 7ns, CMOS

KMM466S424DT-G0 数据手册

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KMM466S424DT  
PC66 SODIMM  
Revision History  
Revision 0.0 (July 7, 1999)  
• Changed tRDL from 1CLK to 2CLK in OPERATING AC PARAMETER.  
• Skip ICC4 value of CL=2 in DC characteristics in datasheet.  
• Define a new parameter of tDAL( 2CLK +20ns), Last data in to Active delay in OPERATING AC PARAMETER.  
• Eliminated FREQUENCY vs.PARAMETER RELATIONSHIP TABLE.  
• Symbol Change Notice  
Before  
After  
I
I
I
Input leakage current (inputs)  
IL  
I
Input leakage current  
LI  
Input leakage current (I/O pins)  
IL  
Output open @ DC characteristic table  
Io  
Output open @ DC characteristic table  
OL  
Test Condition in DC CHARACTERISTIC Change Notice  
Symbol  
Before  
CKE £ VIL(max), tCC = 15ns  
CKE ³ VIH(min), CS ³ VIH(min), tCC = 15ns  
After  
I
I
I
CKE £ VIL(max), tCC = 10ns  
CC2P , CC3P  
I
CKE ³ VIH(min), CS ³ VIH(min), tCC = 10ns  
CC2N , CC3N  
Input signals are changed one time during 30ns  
Input signals are changed one time during 20ns  
I
2 Banks activated  
4 Banks activated  
CC4  
• Added Notes @OPERATING AC PARAMETER  
Notes : 5. For -0, tRDL=1CLK and tDAL=1CLK+20ns is also supported .  
SAMSUNG recommends tRDL=2CLK and tDAL=2CLK + 20ns.  
REV. 0.0 July 1999  

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