KK4024BD

更新时间： 2024-11-27 03:48:07

品牌	Logo	应用领域
可天士 - KODENSHI		计数器高压栅
页数	文件大小	规格书
7页	413K
描述
7 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS

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中文翻译

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数据手册

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KK4024BD 数据手册

TECHNICAL DATA

KK4024B

7 Stage Ripple-Carry Binary

Counter/Divider

High-Voltage Silicon-Gate CMOS

The KK4024B is ripple-carry binary counter. All counter stages are

master-slave flip-flops. The state of a counter advances one count on the

negative transition of each input pulse; a high level on the RESET line

resets the counter to its all zeros state. Schmitt trigger action on the input-

pulse line permits unlimited rise and fall times.

•

Operating Voltage Range: 3.0 to 18 V

Maximum input current of 1 µA at 18 V over full package-temperature

range; 100 nA at 18 V and 25°C

ORDERING INFORMATION

KK4024BN Plastic

•

Noise margin (over full package temperature range):

KK4024BD SOIC

1.0 V min @ 5.0 V supply

T_A= -55° to 125° C for all packages

2.0 V min @ 10.0 V supply

2.5 V min @ 15.0 V supply

LOGIC DIAGRAM

PIN ASSIGNMENT

FUNCTION TABLE

Inputs

Clock Reset

Output

Output state

No change

Advance to

next state

All Outputs

are low

PIN 14 =V_CC

PIN 7 = GND

PIN 8,10,13 = NO CONNECTION

X=don’t care

12 3 4 5 6 7

中文翻译

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