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KK4034BDW PDF预览

KK4034BDW

更新时间: 2024-09-17 03:48:07
品牌 Logo 应用领域
可天士 - KODENSHI 高压
页数 文件大小 规格书
9页 571K
描述
8-Stage Static Bidirectional Parallel/ Serial Input/Output Bus Register High-Voltage Silicon-Gate CMOS

KK4034BDW 数据手册

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TECHNICAL DATA  
KK4034B  
8-Stage Static Bidirectional Parallel/  
Serial Input/Output Bus Register  
High-Voltage Silicon-Gate CMOS  
The KK4034B is a static eight-stage parallel-or serial-input parallel-  
output register. It can be used to:  
1) bidirectionally transfer parallel information between two buses, 2)  
convert serial data to parallel form and direct the parallel data to either of  
two buses, 3) store (recirculate) parallel data, or 4) accept parallel data  
from either of two buses and convert that data to serial form. Inputs that  
control the operations include a single-phase CLOCK (CL), A DATA  
ENABLE (AE), ASYNCHRONOUS/SYNCHRONOUS (A/S), A-BUS-  
TO-B-BUS/ B-BUS-TO-A-BUS (A/B), and PARALLEL/SERIAL (P/S).  
Data inputs include 16 bidirectional parallel data lines of which the  
eight A data lines are inputs (3-state outputs) and the B data lines are  
outputs (inputs) dependung on the signal level on the A/B input. In  
addition, an input for SERIAL DATA is also provided.  
ORDERING INFORMATION  
KK4034BN Plastic  
KK4034BDW SOIC  
TA = -55° to 125° C for all packages  
All register stages are D-type master-slave flip-flops with separate  
master and slave clock inputs generated internally to allow synchronous  
or asynchronous data transfer from master to slave.  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
PIN 24=VCC  
PIN 12= GND  
1

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