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KK4040B PDF预览

KK4040B

更新时间: 2024-11-25 03:48:07
品牌 Logo 应用领域
可天士 - KODENSHI 计数器高压
页数 文件大小 规格书
6页 368K
描述
12-Stage Binary Ripple Counter High-Voltage Silicon-Gate CMOS

KK4040B 数据手册

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TECHNICAL DATA  
KK4040B  
12-Stage Binary Ripple Counter  
High-Voltage Silicon-Gate CMOS  
The KK4040B is ripple-carry binary counter. All counter stages are master-  
slave flip-flops. The state of a counter advances one count on the negative  
transition of each input pulse; a high level on the RESET line resets the counter  
to its all zeros state. Schmitt trigger action on the input-pulse line permits  
unlimited rise and fall times.  
N SUFFIX  
PLASTIC DIP  
16  
1
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
16  
1
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
ORDERING INFORMATION  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
KK4040BN Plastic DIP  
KK4040BD SOIC  
TA = -55° to 125° C for all packages  
LOGIC DIAGRAM  
9
Q1  
PIN ASSIGNMENT  
7
Q2  
6
V
Q12  
Q6  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
CC  
Q3  
Q11  
5
3
10  
CLOCK  
Q4  
Q5  
Q6  
Q7  
Q8  
Q5  
Q10  
Q8  
Q7  
Q4  
Q9  
2
Q3  
RESET  
CLOCK  
Q1  
4
Q2  
13  
12  
GND  
Q9  
FUNCTION TABLE  
14  
15  
Q10  
Inputs  
Clock  
Output  
Q11  
Q12  
1
Reset  
Output state  
L
No change  
11  
Advance to next  
state  
L
RESET  
X
H
All Outputs are low  
H= high level  
L = low level  
X=don’t care  
PIN 16 =VCC  
PIN 8 = GND  
1

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