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KK4015BN PDF预览

KK4015BN

更新时间: 2024-11-07 03:48:07
品牌 Logo 应用领域
可天士 - KODENSHI 移位寄存器光电二极管
页数 文件大小 规格书
6页 387K
描述
Dual 4-Stage Static Shift Register

KK4015BN 数据手册

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TECHNICAL DATA  
KK4015B  
Dual 4-Stage Static Shift Register  
The KK4015B consists of two identical, independent, 4-stage serial-  
input/parallel-output registers. Each register has independent CLOCK and  
RESET inputs as well as a single serial DATA input. “Q” outputs are  
available from each of the four stages on both registers. All register stages  
are D-type, master-slave flip-flops. The logic level present at the DATA  
input is transferred into the first register stage and shifted over one stage  
at each positive-going clock transition. Resetting of all stages is  
accomplished by a high level on the reset line. Register expansion to 8  
stages using one KK4015B package, or to more than 8 stages using  
additional KK4015B’s is possible.  
ORDERING INFORMATION  
KK4015BN Plastic  
KK4015BD SOIC  
TA = -55° to 125° C for all packages  
Operating Voltage Range: 3.0 to 18 V  
Maximum input current of 1 µA at 18 V over full package-temperature  
range; 100 nA at 18 V and 25°C  
Noise margin (over full package temperature range):  
1.0 V min @ 5.0 V supply  
2.0 V min @ 10.0 V supply  
2.5 V min @ 15.0 V supply  
PIN ASSIGNMENT  
LOGIC DIAGRAM  
FUNCTION TABLE  
Inputs  
Outputs  
Clock Data Reset Q1  
Qn  
L
H
X
X
L
L
L
H
L
Qn-1  
Qn-1  
H
No change  
PIN 16=VCC  
PIN 8= GND  
X
L
L
X = don’t care  
1

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