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K7P401823M-HC65T PDF预览

K7P401823M-HC65T

更新时间: 2024-11-12 08:07:51
品牌 Logo 应用领域
三星 - SAMSUNG 静态存储器
页数 文件大小 规格书
12页 235K
描述
Application Specific SRAM, 256KX18, 6.5ns, CMOS, PBGA119

K7P401823M-HC65T 数据手册

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K7P403623M  
K7P401823M  
128Kx36 & 256Kx18 SRAM  
Document Title  
128Kx36 & 256Kx18 Synchronous Pipelined SRAM  
Revision History  
Rev.No.  
History  
DraftDate  
Remark  
Rev. 0.0  
- Preliminary specification release  
Preliminary  
- Change specification format.  
No change was made in parameters.  
Rev. 0.1  
Rev. 0.2  
Preliminary  
Preliminary  
April, 1997  
Jan. 1998  
- Updated Part Number and Pin Description.  
Updated and added Input/Output Voltage Level and VDDQ  
Updated DC Characteristics and Pin Capacitance.  
Updated AC Characteristics, Test Conditions and Timing Wave Form.  
For JTAG, updated Vendor Definition and added tSVCH/tCHSX.  
- Updated PECL Clock Input Level, Output Leakage Current  
Updated 119BGA Package Thermal Characteristics  
Rev. 0.3  
Preliminary  
Final  
Aug. 1998  
- Final specification release  
Rev. 1.0  
Rev. 2.0  
Dec. 1998  
Oct. 2000  
- Single ended LVCMOS clock operation added  
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the  
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-  
tions, please contact the SAMSUNG branch office near your office, call or cortact Headquarters.  
Oct. 2000  
- 1 -  
Rev 2.0  

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