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K3P7U1000B-FC12 PDF预览

K3P7U1000B-FC12

更新时间: 2024-11-01 20:55:23
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM内存集成电路
页数 文件大小 规格书
6页 113K
描述
MASK ROM, 4MX16, 120ns, CMOS, PBGA48, 0.75 MM PITCH, FBGA-48

K3P7U1000B-FC12 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:BGA包装说明:TFBGA, BGA48,6X8,30
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.92最长访问时间:120 ns
其他特性:ALSO CONFIGURABLE AS 4M X 16备用内存宽度:8
JESD-30 代码:S-PBGA-B48JESD-609代码:e0
长度:9 mm内存密度:67108864 bit
内存集成电路类型:MASK ROM内存宽度:16
功能数量:1端子数量:48
字数:4194304 words字数代码:4000000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:4MX16
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA48,6X8,30封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH并行/串行:PARALLEL
峰值回流温度(摄氏度):240电源:3 V
认证状态:Not Qualified座面最大高度:1.2 mm
最大待机电流:0.00005 A子类别:MASK ROMs
最大压摆率:0.05 mA最大供电电压 (Vsup):3.3 V
最小供电电压 (Vsup):2.7 V标称供电电压 (Vsup):3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:BALL端子节距:0.75 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:30
宽度:9 mmBase Number Matches:1

K3P7U1000B-FC12 数据手册

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Preliminary Information  
CMOS MASK ROM  
K3P7V(U)1000B-FC  
64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
The K3P7V(U)1000B-FC is a fully static mask programmable  
ROM fabricated using silicon gate CMOS process technology,  
and is organized either as 8,388,608 x 8 bit(byte mode) or as  
4,194,304 x 16 bit(word mode) depending on BHE voltage level.  
This device includes page read mode function, page read mode  
allows 8 words (or 16 bytes) of data to be read fast in the same  
page, CE and A3 ~ A21 should not be changed.  
· Switchable organization  
8,388,608 x 8(byte mode)  
4,194,304 x 16(word mode)  
· Fast access Time  
Random Access Time/Page Access Time  
3.3V Operation : 100/30ns(max.)  
3.0V Operation : 120/40ns(max.)  
· 8 words / 16bytes page access  
· Supply voltage  
VCC : single +3.3V/ single +3.0V  
VCCQ : equal to VCC  
· Temperature : 0°C ~ +70°C  
· Current consumption  
Operating(ICC) : 60mA (max)  
Standby(ISB2) : 50uA (max)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Package  
This device operates with 3.0V or 3.3V power supply, and all  
inputs and outputs are TTL compatible.  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
operating system and/or application software storage for hand-  
held application.  
The K3P7V(U)1000B-FC is packaged in a 48-CSP with 0.75mm  
ball pitch and 6x8 ball array.  
K3P7V(U)1000B-FC : 48-CSP with 0.75mm ball pitch  
FUNCTIONAL BLOCK DIAGRAM  
Pin Name  
A0 - A2  
Pin Function  
Page Address Inputs  
A21  
X
MEMORY CELL  
MATRIX  
A3 - A21  
Q0 - Q14  
Address Inputs  
Data Outputs  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(4,194,304x16/  
8,388,608x8)  
Output 15(Word mode)/  
LSB Address(Byte mode)  
DECODER  
Q15 /A-1  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Y
SENSE AMP.  
OE  
Output Enable  
Power  
BUFFERS  
AND  
VCC  
VCCQ  
VSS  
NC  
DATA OUT  
BUFFERS  
Data Output Power ( =VCC)  
Ground  
DECODER  
A3  
A0~A2  
A-1  
No Connection  
. . .  
CE  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
OE  
BHE  

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