Datasheet > K3P7V1000B-TC10

K3P7V1000B-TC10

更新时间： 2024-02-08 21:36:57

品牌	Logo	应用领域
三星 - SAMSUNG		有原始数据的样本ROM 光电二极管
页数	文件大小	规格书
4页	62K
描述
MASK ROM, 4MX16, 100ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

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K3P7V1000B-TC10 数据手册

K3P7V(U)1000B-TC

CMOS MASK ROM

64M-Bit (8Mx8 /4Mx16) CMOS MASK ROM

FEATURES

· Switchable organization

8,388,608 x 8(byte mode)

4,194,304 x 16(word mode)

· Fast access time

Random Access Time/Page Access Time

3.3V Operation : 100/30ns(Max.)@CL=50pF,

120/40ns(Max.)@CL=100pF

3.0V Operation : 120/40ns(Max.)@CL=100pF

8 Words / 16 Bytes page access

· Supply voltage : single +3.0V/ single +3.3V

· Current consumption

GENERAL DESCRIPTION

The K3P7V(U)1000B-TC is a fully static mask programmable

ROM fabricated using silicon gate CMOS process technology,

and is organized either as 8,388,608 x 8 bit(byte mode) or as

4,194,304 x 16 bit(word mode) depending on BHE voltage

level.(See mode selection table)

This device includes page read mode function, page read mode

allows 8 words (or 16 bytes) of data to read fast in the same

page, CE and A3 ~ A21 should not be changed.

This device operates with 3.0V or 3.3V power supply, and all

inputs and outputs are TTL compatible.

Operating : 60mA(Max.)

Standby : 50mA(Max.)

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

· Fully static operation

· All inputs and outputs TTL compatible

· Three state outputs

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

The K3P7V(U)1000B-TC is packaged in a 44-TSOP2.

· Package

-. K3P7V(U)1000B-TC : 44-TSOP2-400

PIN CONFIGURATION

FUNCTIONAL BLOCK DIAGRAM

A21

MEMORY CELL

MATRIX

(4,194,304x16/

8,388,608x8)

A21

A18

A20

A19

BUFFERS

AND

DECODER

A17

40 A10

A11

A12

SENSE AMP.

BUFFERS

AND

DECODER

37 A13

DATA OUT

BUFFERS

A14

A15

A0~A2

A-1

A16

TSOP2

CE 12

BHE

VSS

Q15/A-1

Q0/Q8

Q7/Q15

CONTROL

LOGIC

Q14

BHE

Q13

Q2 19

Q10 20

Q12

Pin Name

A0 - A2

Pin Function

Page Address Inputs

Address Inputs

Data Outputs

Q11

VCC

A3 - A21

Q0 - Q14

Q15 /A-1

K3P7V(U)1000B-TC

Output 15(Word mode)/

LSB Address(Byte mode)

BHE

Word/Byte selection

Chip Enable

Output Enable

Power

VCC

VSS

Ground

12 3 4

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