Datasheet > K3P4C1000D-TE120

K3P4C1000D-TE120

更新时间： 2024-11-26 09:21:43

品牌	Logo	应用领域
三星 - SAMSUNG		有原始数据的样本ROM 光电二极管
页数	文件大小	规格书
4页	63K
描述
MASK ROM, 512KX16, 120ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

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中文翻译

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数据手册

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K3P4C1000D-TE120 数据手册

K3P4C1000D-TC(E)

CMOS MASK ROM

8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM

FEATURES

GENERAL DESCRIPTION

· Switchable organization

1,048,576 x 8(byte mode)

524,288 x 16(word mode)

· Fast access time

The K3P4C1000D-TC(E) is a fully static mask programmable

ROM fabricated using silicon gate CMOS process technology,

and is organized either as 1,048,576 x 8 bit(byte mode) or as

524,288 x 16 bit(word mode) depending on BHE voltage

level.(See mode selection table)

This device includes page read mode function, page read mode

allows 4 words (or 8bytes) of data to read fast in the same

page, CE and A2 ~ A18 should not be changed.

Random Access : 100ns(Max.)

Page Access

: 30ns(Max.)

· 4 Words / 8 bytes page access

· Supply voltage : single +5V

· Current consumption

This device operates with a 5V single power supply, and all

inputs and outputs are TTL compatible.

Operating : 80mA(Max.)

Standby : 50mA(Max.)

· Fully static operation

· All inputs and outputs TTL compatible

· Three state outputs

· Package

-. K3P4C1000D-TC(E) : 44-TSOP2-400

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

The K3P4C1000D-TC(E) is packaged in a 44-TSOP2.

FUNCTIONAL BLOCK DIAGRAM

PRODUCT INFORMATION

Operating

Temp Range

Vcc Range

(Typical)

Speed

(ns)

Product

A18

MEMORY CELL

MATRIX

K3P4C1000D-TC

K3P4C1000D-TE

0°C~70°C

BUFFERS

AND

5.0V

100

(524,288x16/

1,048,576x8)

-20°C~85°C

DECODER

PIN CONFIGURATION

SENSE AMP.

BUFFERS

AND

DATA OUT

BUFFERS

DECODER

N.C

A18

A17

44 N.C

N.C

A0~A1

A-1

. . .

A10

A11

A12

Q0/Q8

Q7/Q15

CONTROL

LOGIC

A13

A14

BHE

A15

Pin Name

A0 - A1

Pin Function

A16

TSOP2

BHE

VSS

Page Address Inputs

Address Inputs

Data Outputs

A2- A18

Q15/A-1

Q0 - Q14

Output 15(Word mode)/

LSB Address(Byte mode)

29 Q14

28 Q6

Q15 /A-1

BHE

Word/Byte selection

Chip Enable

Q13

Q2 19

Q10 20

Q12

Output Enable

Power ( +5V)

Ground

VCC

VSS

N.C

Q11

VCC

No Connection

K3P4C1000D-TC(E)

12 3 4

中文翻译

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与K3P4C1000D-TE120相关器件

型号	品牌	获取价格	描述	数据表
K3P4C1000D-TE15	SAMSUNG	获取价格	MASK ROM, 512KX16, 150ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44
K3P4C1000D-TE150	SAMSUNG	获取价格	MASK ROM, 512KX16, 150ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44
K3P4C1000E-DC100	SAMSUNG	获取价格	MASK ROM, 512KX16, 100ns, CMOS, PDIP42, 0.600 INCH, DIP-42
K3P4C1000E-DC12	SAMSUNG	获取价格	MASK ROM, 512KX16, 120ns, CMOS, PDIP42
K3P4C1000E-DC120	SAMSUNG	获取价格	MASK ROM, 512KX16, 120ns, CMOS, PDIP42, 0.600 INCH, DIP-42
K3P4C1000E-DC15	SAMSUNG	获取价格	MASK ROM, 512KX16, 150ns, CMOS, PDIP42
K3P4C1000E-GC100	SAMSUNG	获取价格	MASK ROM, 512KX16, 100ns, CMOS, PDSO44, 0.600 INCH, SOP-44
K3P4C1000E-GC12	SAMSUNG	获取价格	MASK ROM, 512KX16, 120ns, CMOS, PDSO44
K3P4C1000E-GC15	SAMSUNG	获取价格	MASK ROM, 512KX16, 150ns, CMOS, PDSO44
K3P4C1000E-TC120	SAMSUNG	获取价格	MASK ROM, 512KX16, 120ns, CMOS, PDSO44, 0.400 INCH, TSOP2-44

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