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K3P4V1000D-GC100 PDF预览

K3P4V1000D-GC100

更新时间: 2024-11-25 21:17:23
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
4页 65K
描述
MASK ROM, 512KX16, 100ns, CMOS, PDSO44, 0.600 INCH, SOP-44

K3P4V1000D-GC100 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP,
针数:44Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.29最长访问时间:100 ns
备用内存宽度:8JESD-30 代码:R-PDSO-G44
长度:28.5 mm内存密度:8388608 bit
内存集成电路类型:MASK ROM内存宽度:16
功能数量:1端子数量:44
字数:524288 words字数代码:512000
工作模式:ASYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:512KX16
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
并行/串行:PARALLEL峰值回流温度(摄氏度):225
认证状态:Not Qualified座面最大高度:3.1 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:12.6 mmBase Number Matches:1

K3P4V1000D-GC100 数据手册

 浏览型号K3P4V1000D-GC100的Datasheet PDF文件第2页浏览型号K3P4V1000D-GC100的Datasheet PDF文件第3页浏览型号K3P4V1000D-GC100的Datasheet PDF文件第4页 
K3P4V(U)1000D-D(G)C  
CMOS MASK ROM  
8M-Bit (1Mx8 /512Kx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
1,048,576 x 8(byte mode)  
524,288 x 16(word mode)  
· Random access time/Page Access Time  
3.3V Operation : 100/30ns(Max.)  
3.0V Operation : 120/40ns(Max.)  
· 4 Words / 8 bytes page access  
· Supply voltage : single +3.0V/ single +3.3V  
· Current consumption  
The K3P4V(U)1000D-D(G)C is a fully static mask programma-  
ble ROM fabricated using silicon gate CMOS process technol-  
ogy, and is organized either as 1,048,576 x 8 bit(byte mode) or  
as 524,288 x 16 bit(word mode) depending on BHE voltage  
level.(See mode selection table)  
This device includes page read mode function, page read mode  
allows 4 words (or 8bytes) of data to read fast in the same  
page, CE and A2 ~ A18 should not be changed.  
This device operates with a 3.0V or 3.3V power supply, and all  
inputs and outputs are TTL compatible.  
Operating : 40mA(Max.)  
Standby : 30mA(Max.)  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
· Package  
-. K3P4V(U)1000D-DC : 42-DIP-600  
-. K3P4V(U)1000D-GC : 44-SOP-600  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
The K3P4V(U)1000D-DC is packaged in a 42-DIP and the  
K3P4V(U)1000D-GC in a 44-SOP.  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A18  
X
MEMORY CELL  
MATRIX  
BUFFERS  
AND  
.
.
.
.
.
.
.
.
(524,288x16/  
1,048,576x8)  
DECODER  
A18  
A17  
A7  
1
2
42 N.C  
N.C  
A18  
44 N.C  
1
2
A8  
41  
43  
42  
41  
40  
39  
38  
N.C  
A8  
3
40 A9  
A17  
A7  
3
Y
SENSE AMP.  
A6  
4
A10  
39  
4
A9  
BUFFERS  
AND  
A5  
5
38 A11  
37 A12  
A6  
A5  
A4  
A3  
5
A10  
A11  
A12  
DATA OUT  
BUFFERS  
A4  
6
6
DECODER  
A3  
A2  
7
36  
A13  
35 A14  
7
A2  
8
A0~A1  
A-1  
8
37 A13  
36 A14  
A1  
9
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
22  
A15  
A2  
A1  
9
A0  
10  
11  
.
.
.
A16  
10  
11  
12  
13  
A15  
35  
34  
33  
32  
CE  
BHE  
VSS  
Q15/A-1  
Q7  
A0  
A16  
DIP  
VSS 12  
SOP  
CE  
BHE  
VSS  
CE  
VSS  
OE  
Q0  
Q8  
13  
14  
15  
Q0/Q8  
Q7/Q15  
CONTROL  
LOGIC  
OE  
OE 14  
31 Q15/A-1  
30 Q7  
Q14  
Q6  
Q0  
15  
BHE  
Q1 16  
Q9  
Q8  
Q1  
Q9  
16  
17  
18  
Q14  
Q6  
29  
28  
27  
26  
25  
24  
23  
17  
Q2 18  
Q13  
Q5  
Pin Name  
A0 - A1  
Pin Function  
Page Address Inputs  
Q13  
Q5  
Q10  
Q3  
19  
20  
21  
Q12  
Q4  
Q2 19  
A2 - A18  
Q0 - Q14  
Address Inputs  
Data Outputs  
Q12  
Q4  
Q10 20  
Q11  
VCC  
Q3  
21  
22  
Q11  
VCC  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
K3P4V(U)1000D-DC  
K3P4V(U)1000D-GC  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power  
OE  
VCC  
VSS  
N.C  
Ground  
No Connection  

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