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K3P4V1000E-DC10 PDF预览

K3P4V1000E-DC10

更新时间: 2024-11-25 20:06:39
品牌 Logo 应用领域
三星 - SAMSUNG 有原始数据的样本ROM光电二极管内存集成电路
页数 文件大小 规格书
4页 39K
描述
MASK ROM, 512KX16, 100ns, CMOS, PDIP42, 0.600 INCH, DIP-42

K3P4V1000E-DC10 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:DIP包装说明:DIP, DIP42,.6
针数:42Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.71
风险等级:5.29最长访问时间:100 ns
备用内存宽度:8JESD-30 代码:R-PDIP-T42
JESD-609代码:e0长度:52.42 mm
内存密度:8388608 bit内存集成电路类型:MASK ROM
内存宽度:16功能数量:1
端子数量:42字数:524288 words
字数代码:512000工作模式:ASYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:512KX16封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP42,.6
封装形状:RECTANGULAR封装形式:IN-LINE
并行/串行:PARALLEL峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3 V认证状态:Not Qualified
座面最大高度:5.08 mm最大待机电流:0.00003 A
子类别:MASK ROMs最大压摆率:0.04 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:15.24 mm
Base Number Matches:1

K3P4V1000E-DC10 数据手册

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K3P4V(U)1000E-D(G)C  
CMOS MASK ROM  
8M-Bit (1Mx8/ 512Kx16) CMOS MASK ROM  
FEATURES  
GENERAL DESCRIPTION  
· Switchable organization  
The K3P4V(U)1000E-D(G)C is a fully static mask programma-  
ble ROM fabricated using silicon gate CMOS process technol-  
ogy, and is organized either as 1,048,576 x 8(byte mode) or as  
524,288 x 16(word mode) depending on BHE voltage level.(See  
mode selection table)  
1,048,576 x 8(byte mode)  
524,288 x 16(word mode)  
· Fast access time  
Random Access Time/Page Access Time  
3.3V Operation : 100/30ns(Max.)@CL=50pF,  
120/40ns(Max.)@CL=100pF  
3.0V Operation : 120/40ns(Max.)@CL=100pF  
4 Words / 8 Bytes page access  
· Supply voltage : single +3.0V/ single +3.3V  
· Current consumption  
This device includes page read mode function, page read mode  
allows 4 words (or 8 bytes) of data to read fast in the same  
page, CE and A2 ~ A18 should not be changed.  
This device operates with 3.0V or 3.3V power supply, and all  
inputs and outputs are TTL compatible.  
Operating : 40mA(Max.)  
Standby : 30 mA(Max.)  
Because of its asynchronous operation, it requires no external  
clock assuring extremely easy operation.  
· Fully static operation  
· All inputs and outputs TTL compatible  
· Three state outputs  
It is suitable for use in program memory of microprocessor, and  
data memory, character generator.  
The K3P4V(U)1000E-DC is packaged in a 42-DIP and the  
K3P4V(U)1000E-GC in a 44-SOP.  
· Package  
-. K3P4V(U)1000E-DC : 42-DIP-600  
-. K3P4V(U)1000E-GC : 44-SOP-600  
FUNCTIONAL BLOCK DIAGRAM  
PIN CONFIGURATION  
A18  
1
2
42N.C  
41 A8  
40 A9  
39 A10  
38 A11  
N.C  
1
2
44 N.C  
N.C  
A18  
X
MEMORY CELL  
MATRIX  
A17  
A7  
A18  
43  
42 A8  
A9  
BUFFERS  
AND  
DECODER  
.
.
.
.
.
.
.
.
3
A17  
A7  
3
(524,288x16/  
1,048,576x8)  
4
A6  
A5  
4
41  
40 A10  
A11  
5
A6  
A5  
A4  
A3  
5
6
A4  
37  
36  
35  
A12  
6
39  
7
A3  
A13  
A14  
7
38 A12  
8
A2  
A1  
Y
8
37 A13  
36 A14  
SENSE AMP.  
DATA OUT  
BUFFERS  
9
34 A15  
33 A16  
BUFFERS  
AND  
A2  
A1  
9
10  
11  
12  
13  
14  
15  
16  
A0  
CE  
VSS  
OE  
Q0  
10  
A15  
35  
32  
31  
30  
BHE  
VSS  
A0 11  
34 A16  
A2  
DECODER  
DIP  
SOP  
CE 12  
33 BHE  
32 VSS  
A0~A1  
A-1  
Q15/A-1  
VSS  
13  
29 Q7  
28  
OE 14  
Q0 15  
Q8 16  
Q15/A-1  
.
.
.
31  
Q8  
Q1  
Q14  
27 Q6  
30 Q7  
29 Q14  
CE  
Q9 17  
26  
25  
24  
23  
22  
Q13  
Q5  
Q0/Q8  
Q7/Q15  
Q1  
Q9  
Q6  
17  
18  
28  
27 Q13  
Q5  
CONTROL  
LOGIC  
18  
Q2  
OE  
19  
20  
21  
Q10  
Q3  
Q12  
Q4  
Q2 19  
26  
25 Q12  
Q4  
BHE  
Q10 20  
Q11  
VCC  
Q3  
21  
22  
24  
23 VCC  
Pin Name  
A0 - A1  
Pin Function  
Q11  
Page Address Inputs  
Address Inputs  
K3P4V(U)1000E-DC  
A2 - A18  
Q0 - Q14  
K3P4V(U)1000E-GC  
Data Outputs  
Output 15(Word mode)/  
LSB Address(Byte mode)  
Q15 /A-1  
BHE  
CE  
Word/Byte selection  
Chip Enable  
Output Enable  
Power  
OE  
VCC  
VSS  
N.C  
Ground  
No Connection  

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