Datasheet > K3N3C3000D-GC120

K3N3C3000D-GC120

更新时间： 2023-02-26 15:36:54

品牌	Logo	应用领域
三星 - SAMSUNG		有原始数据的样本ROM 光电二极管
页数	文件大小	规格书
3页	45K
描述
MASK ROM, 512KX8, 120ns, CMOS, PDSO32, 0.525 INCH, SOP-32

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数据手册

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K3N3C3000D-GC120 数据手册

K3N3C3000D-D(G)C

CMOS MASK ROM

4M-Bit (512Kx8) CMOS MASK ROM

FEATURES

GENERAL DESCRIPTION

· 524,288x8 bit organization

· Access time : 80ns(Max.)

· Supply voltage : single +5V

· Current consumption

Operating : 50mA(Max.)

Standby : 50mA(Max.)

· Fully static operation

· All inputs and outputs TTL compatible

· Three state outputs

The K3N3C3000D-D(G)C is a fully static mask programmable

ROM organized 524,288 x 8 bit. It is fabricated using silicon

gate CMOS process technology.

This device operates with a 5V single power supply, and all

inputs and outputs are TTL compatible.

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

· Package

The K3N3C3000D-DC is packaged in a 32-DIP and the

K3N3C3000D-GC in a 32-SOP.

-. K3N3C3000D-DC : 32-DIP-600

-. K3N3C3000D-GC : 32-SOP-525

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

A18

MEMORY CELL

MATRIX

BUFFERS

AND

N.C

A16

A15

A12

VCC

(524,288x8)

31 A18

DECODER

A17

A14

A13

SENSE AMP.

BUFFERS

AND

DIP

DECODER

A11

SOP

. .

23 A10

21 CE

CONTROL

LOGIC

VSS

19 Q5

Pin Name

A0 - A18

Q0 - Q7

Pin Function

Address Inputs

Data Outputs

Chip Enable

Output Enable

Power(+5V)

Ground

K3N3C3000D-D(G)C

VCC

VSS

N.C

No Connection

12 3

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K3N3C6000D-DC	SAMSUNG	获取价格	MASK ROM
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