Datasheet > K3N3U3000D-DG12

K3N3U3000D-DG12

更新时间： 2023-01-03 00:02:13

品牌	Logo	应用领域
三星 - SAMSUNG		有原始数据的样本ROM 光电二极管
页数	文件大小	规格书
3页	45K
描述
MASK ROM, 512KX8, 120ns, CMOS, PDSO32, 0.525 INCH, SOP-32

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中文翻译

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数据手册

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K3N3U3000D-DG12 数据手册

K3N3V(U)3000D-D(G)C

CMOS MASK ROM

4M-Bit (512Kx8) CMOS MASK ROM

FEATURES

GENERAL DESCRIPTION

The K3N3V(U)3000D-D(G)C is a fully static mask programma-

ble ROM organized 524,288 x 8 bit. It is fabricated using silicon

gate CMOS process technology.

· 524,288 x 8 bit organization

· Fast access time

3.3V Operation : 100ns(Max.)

3.0V Operation : 120ns(Max.)

· Supply voltage : single +3.0V/ single +3.3V

· Current consumption

Operating : 25mA(Max.)

Standby : 30mA(Max.)

· Fully static operation

· All inputs and outputs TTL compatible

· Three state outputs

This device operates with 3.0V or 3.3V power supply, and all

inputs and outputs are TTL compatible.

Because of its asynchronous operation, it requires no external

clock assuring extremely easy operation.

It is suitable for use in program memory of microprocessor, and

data memory, character generator.

The K3N3V(U)3000D-DC is packaged in a 32-DIP and the

K3N3V(U)3000D-GC in a 32-SOP.

· Package

-. K3N3V(U)3000D-DC : 32-DIP-600

-. K3N3V(U)3000D-GC : 32-SOP-525

FUNCTIONAL BLOCK DIAGRAM

PIN CONFIGURATION

A18

MEMORY CELL

MATRIX

BUFFERS

AND

(524,288x8)

N.C

A16

A15

A12

32 VCC

31 A18

DECODER

A17

A14

A13

SENSE AMP.

BUFFERS

AND

DECODER

DIP

SOP

A11

. . .

A10

21 CE

CONTROL

LOGIC

VSS

19 Q5

Pin Name

A0 - A18

Q0 - Q7

Pin Function

Address Inputs

Data Outputs

Chip Enable

Output Enable

Power

K3N3V(U)3000D-D(G)C

VCC

VSS

Ground

N.C

No Connection

12 3

中文翻译

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K3N3V1000D-DC	SAMSUNG	获取价格	MASK ROM
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K3N3V1000D-GC	SAMSUNG	获取价格	MASK ROM
K3N3V1000D-GC10	SAMSUNG	获取价格	MASK ROM, 256KX16, 100ns, CMOS, PDSO40, 0.525 INCH, SOP-40
K3N3V1000D-GC100	SAMSUNG	获取价格	MASK ROM, 256KX16, 100ns, CMOS, PDSO40, 0.525 INCH, SOP-40