Datasheet > IS62LV12816BL-55B

IS62LV12816BL-55B

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
美国芯成 - ISSI		静态存储器
页数	文件大小	规格书
10页	92K
描述
Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, MINI, BGA-48

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IS62LV12816BL-55B 数据手册

IS62LV12816BL/LL

ISSI

AC WAVEFORMS

READ CYCLE NO. 1^(1,2)(Address Controlled) (CE = OE = VIL, UB or LB = VIL)

ADDRESS

OHA

DATA VALID

DOUT

PREVIOUS DATA VALID

AC WAVEFORMS

READ CYCLE NO. 2^(1,3)(CE, OE, AND UB/LB Controlled)

tRC

ADDRESS

tAA

tOHA

HZOE

DOE

LZOE

ACE

HZCE

tLZCE

LB, UB

tBA

tHZB

tLZB

HIGH-Z

OUT

DATA VALID

Notes:

1. WE is HIGH for a Read Cycle.

2. The device is continuously selected. OE, CE, UB, or LB = V^IL.

3. Address is valid prior to or coincident with CE LOW transition.

Integrated Silicon Solution, Inc. — 1-800-379-4774

PRELIMINARY INFORMATION Rev. 00B

02/29/00

1...3 4 567 8 9 10

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