Datasheet > IS62LV12816BL-55B

IS62LV12816BL-55B

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
美国芯成 - ISSI		静态存储器
页数	文件大小	规格书
10页	92K
描述
Standard SRAM, 128KX16, 55ns, CMOS, PBGA48, MINI, BGA-48

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

IS62LV12816BL-55B 数据手册

浏览型号IS62LV12816BL-55B的Datasheet PDF文件第4页

浏览型号IS62LV12816BL-55B的Datasheet PDF文件第5页

浏览型号IS62LV12816BL-55B的Datasheet PDF文件第6页

浏览型号IS62LV12816BL-55B的Datasheet PDF文件第8页

浏览型号IS62LV12816BL-55B的Datasheet PDF文件第9页

浏览型号IS62LV12816BL-55B的Datasheet PDF文件第10页

IS62LV12816BL/LL

WRITE CYCLE SWITCHING CHARACTERISTICS^(1,2)(Over Operating Range)

ISSI

-55

-70

-100

Symbol

tWC

Parameter

Min. Max.

Unit

Write Cycle Time

—

100

—

tSCE

tAW

CE to Write End

Address Setup Time to Write End

Address Hold from Write End

Address Setup Time

tHA

tSA

tPWB

tPWE

tSD

LB, UB Valid to End of Write

WE Pulse Width

Data Setup to Write End

Data Hold from Write End

WE LOW to High-Z Output

WE HIGH to Low-Z Output

tHD

(3)

tHZWE

—

(3)

tLZWE

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.3V, input pulse levels of 0.4V to 2.2V

and output loading specified in Figure 1.

2. The internal write time is defined by the overlap of CE LOW and UB or LB, and WE LOW. All signals must be in valid states

to initiate a Write, but any one can go inactive to terminate the Write. The Data Input Setup and Hold timing are referenced

to the rising or falling edge of the signal that terminates the write.

3. Tested with the load in Figure 2. Transition is measured 500 mV from steady-state voltage. Not 100ꢀ tested.

AC WAVEFORMS

WRITE CYCLE NO. 1^(1,2)(CE Controlled, OE = HIGH or LOW)

VALID ADDRESS

SCS

ADDRESS

t^PPW^WE^E2¹

PBW

UB, LB

HZWE

LZWE

HIGH-Z

DATA UNDEFINED

DOUT

DATAIN VALID

UB_CSWR1.eps

Notes:

1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least one

of the LB and UB inputs being in the LOW state.

2. WRITE = (CE) [ (LB) = (UB) ] (WE).

Integrated Silicon Solution, Inc. — 1-800-379-4774

PRELIMINARY INFORMATION Rev. 00B

02/29/00

1...4 5 678 9 10

下载PDF

与IS62LV12816BL-55B相关器件

型号	品牌	描述	获取价格	数据表
IS62LV12816BL-55T	ISSI	Standard SRAM, 128KX16, 55ns, CMOS, PDSO44, TSOP2-44	获取价格
IS62LV12816BL-55TI	ISSI	Standard SRAM, 128KX16, 55ns, CMOS, PDSO44, TSOP2-44	获取价格
IS62LV12816BL-70B	ISSI	Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, MINI, BGA-48	获取价格
IS62LV12816BL-70T	ISSI	Standard SRAM, 128KX16, 70ns, CMOS, PDSO44, TSOP2-44	获取价格
IS62LV12816BLL	ISSI	128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM	获取价格
IS62LV12816BLL-10B	ISSI	128K x 16 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM	获取价格