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IS61WV25632BLL PDF预览

IS61WV25632BLL

更新时间: 2024-11-13 01:10:15
品牌 Logo 应用领域
美国芯成 - ISSI /
页数 文件大小 规格书
19页 494K
描述
TTL compatible inputs and outputs

IS61WV25632BLL 数据手册

 浏览型号IS61WV25632BLL的Datasheet PDF文件第2页浏览型号IS61WV25632BLL的Datasheet PDF文件第3页浏览型号IS61WV25632BLL的Datasheet PDF文件第4页浏览型号IS61WV25632BLL的Datasheet PDF文件第5页浏览型号IS61WV25632BLL的Datasheet PDF文件第6页浏览型号IS61WV25632BLL的Datasheet PDF文件第7页 
IS61WV25632ALL/ALS  
IS61WV25632BLL/BLS  
IS64WV25632BLL/BLS  
256K x 32 HIGH-SPEED ASYNCHRONOUS  
CMOS STATIC RAM WITH 3.3V SUPPLY  
PRELIMINARY INFORMATION  
APRIL 2008  
FEATURES  
DESCRIPTION  
The ISSI IS61WV25632Axx/Bxx and IS64WV25632Bxx  
are high-speed, 8M-bit static RAMs organized as 256K  
words by 32 bits. It is fabricated using ISSI's high-per-  
formance CMOS technology. This highly reliable process  
coupled with innovative circuit design techniques, yields  
high-performance and low power consumption devices.  
• High-speed access times:  
8, 10, 20 ns  
• High-performance, low-power CMOS process  
• Multiple center power and ground pins for  
greater noise immunity  
• Easy memory expansion with CE and OE op-  
tions  
CE power-down  
• Fully static operation: no clock or refresh  
When CE is HIGH (deselected), the device assumes  
a standby mode at which the power dissipation can be  
reduced down with CMOS input levels.  
required  
Easymemory expansion is provided by using Chip Enable  
and Output Enable inputs, CE and OE. The active LOW  
Write Enable (WE) controls both writing and reading of  
the memory.  
• TTL compatible inputs and outputs  
• Single power supply  
Vd d 1.65V to 2.2V (IS61WV25632Axx)  
speed = 20ns for Vd d 1.65V to 2.2V  
Vd d 2.4V to 3.6V (IS61/64WV25632Bxx)  
speed = 10ns for Vd d 2.4V to 3.6V  
speed = 8ns for Vd d 3.3V + 5%  
• Packages available:  
The device is packaged in the JEDEC standard 90-ball  
BGA (8mm x 13mm).  
90-ball miniBGA (8mm x 13mm)  
• Industrial and Automotive Temperature Support  
• Lead-free available  
FUNCTIONAL BLOCK DIAGRAM  
256K x 32  
MEMORY ARRAY  
A0-A17  
DECODER  
VDD  
VSS  
DQa-d  
I/O  
COLUMN I/O  
DATA  
CIRCUIT  
CE  
OE  
WE  
CONTROL  
CIRCUIT  
BWa-d  
CE2  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without  
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the  
latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com  
1
Rev. 00B  
04/23/08  

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