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IS42S16800A1-7TL PDF预览

IS42S16800A1-7TL

更新时间: 2024-11-24 04:44:43
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器
页数 文件大小 规格书
63页 966K
描述
8Meg x16 128-MBIT SYNCHRONOUS DRAM

IS42S16800A1-7TL 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSOP2包装说明:TSOP2, TSOP54,.46,32
针数:54Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.32.00.02
风险等级:5.47访问模式:FOUR BANK PAGE BURST
最长访问时间:7 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):143 MHzI/O 类型:COMMON
交错的突发长度:1,2,4,8JESD-30 代码:R-PDSO-G54
JESD-609代码:e3长度:22.22 mm
内存密度:134217728 bit内存集成电路类型:SYNCHRONOUS DRAM
内存宽度:16湿度敏感等级:3
功能数量:1端口数量:1
端子数量:54字数:8388608 words
字数代码:8000000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP2
封装等效代码:TSOP54,.46,32封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE峰值回流温度(摄氏度):260
电源:3.3 V认证状态:Not Qualified
刷新周期:4096座面最大高度:1.2 mm
自我刷新:YES连续突发长度:1,2,4,8,FP
最大待机电流:0.0025 A子类别:DRAMs
最大压摆率:0.17 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn) - annealed
端子形式:GULL WING端子节距:0.8 mm
端子位置:DUAL处于峰值回流温度下的最长时间:10
宽度:10.16 mm

IS42S16800A1-7TL 数据手册

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®
IS42S16800A1  
ISSI  
8Meg x16  
128-MBIT SYNCHRONOUS DRAM  
PRELIMINARY INFORMATION  
MAY 2006  
OVERVIEW  
FEATURES  
ISSI's 128Mb Synchronous DRAM achieves high-speed  
data transfer using pipeline architecture. All inputs and  
outputs signals refer to the rising edge of the clock  
input.The 128Mb SDRAM is organized as follows.  
• Clock frequency: 143 MHz  
• Fully synchronous; all signals referenced to a  
positive clock edge  
• Internal bank for hiding row access/precharge  
• Power supply  
VDD  
VDDQ  
IS42S16800A1  
2M x16x4 Banks  
54-pin TSOPII  
IS42S16800A1  
3.3V 3.3V  
• LVTTL interface  
• Programmable burst length  
– (1, 2, 4, 8, full page)  
• Programmable burst sequence:  
Sequential/Interleave  
• Auto Refresh (CBR)  
• Self Refresh with programmable refresh periods  
• 4096 refresh cycles every 64 ms  
KEY TIMING PARAMETERS  
• Random column address every clock cycle  
• Programmable CAS latency (2, 3 clocks)  
Parameter  
-7  
Unit  
CK Cycle Time  
CAS Latency = 3  
7
7.5  
ns  
ns  
• Burst read/write and burst read/single write  
operations capability  
CAS Latency = 2  
CK Frequency  
CAS Latency = 3  
CAS Latency = 2  
• Burst termination by burst stop and precharge  
command  
143  
133  
Mhz  
Mhz  
• Lead-free Availability  
Access Time from Clock  
CAS Latency = 3  
5
5.4  
ns  
ns  
CAS Latency = 2  
Copyright © 2006 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any  
time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are  
advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. 00B  
05/01/06  

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