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IS42RM32100D-6BLI PDF预览

IS42RM32100D-6BLI

更新时间： 2024-02-02 08:05:06
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器内存集成电路
页数 文件大小 规格书
34页 546K
描述
Synchronous DRAM, 1MX32, 5.5ns, CMOS, PBGA90, 8 X 13 MM, LEAD FREE, MO-207, TFBGA-90

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IS42RM32100D-6BLI 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：TFBGA,Reach Compliance Code：compliant
ECCN代码：EAR99Factory Lead Time：10 weeks
风险等级：5.72访问模式：FOUR BANK PAGE BURST
最长访问时间：5.5 ns其他特性：AUTO/SELF REFRESH
JESD-30 代码：R-PBGA-B90长度：13 mm
内存密度：33554432 bit内存集成电路类型：SYNCHRONOUS DRAM
内存宽度：32功能数量：1
端口数量：1端子数量：90
字数：1048576 words字数代码：1000000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：1MX32
封装主体材料：PLASTIC/EPOXY封装代码：TFBGA
封装形状：RECTANGULAR封装形式：GRID ARRAY, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED座面最大高度：1.2 mm
自我刷新：YES最大供电电压 (Vsup)：2.7 V
最小供电电压 (Vsup)：2.3 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子形式：BALL
端子节距：0.8 mm端子位置：BOTTOM
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：8 mm
Base Number Matches：1

IS42RM32100D-6BLI 数据手册

 浏览型号IS42RM32100D-6BLI的Datasheet PDF文件第2页浏览型号IS42RM32100D-6BLI的Datasheet PDF文件第3页浏览型号IS42RM32100D-6BLI的Datasheet PDF文件第4页浏览型号IS42RM32100D-6BLI的Datasheet PDF文件第5页浏览型号IS42RM32100D-6BLI的Datasheet PDF文件第6页浏览型号IS42RM32100D-6BLI的Datasheet PDF文件第7页 
IS42/45SM/RM/VM32100D  
512K x 32Bits x 2Banks Low Power Synchronous DRAM  
Description  
These IS42SM/RM/VM32100D are low power 33,554,432 bits CMOS Synchronous DRAM organized as 2 banks of 524,288 words x 32  
bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs  
are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input  
and output voltage levels are compatible with LVCMOS.  
Features  
. JEDEC standard 3.3V, 2.5V, 1.8V power supply.  
• Auto refresh and self refresh.  
• All inputs and outputs referenced to the positive edge of the  
system clock.  
• All pins are compatible with LVCMOS interface.  
• 4K refresh cycle / 64ms.  
• Data mask function by DQM.  
• Internal dual banks operation.  
• Programmable Burst Length and Burst Type.  
- 1, 2, 4, 8 or Full Page for Sequential Burst.  
- 4 or 8 for Interleave Burst.  
• Burst Read Single Write operation.  
• Special Function Support.  
- PASR(Partial Array Self Refresh)  
• Programmable CAS Latency : 2,3 clocks.  
- Auto TCSR(Temperature Compensated Self Refresh)  
• Programmable Driver Strength Control  
- Full Strength or 1/2, 1/4, of Full Strength  
• Deep Power Down Mode.  
• Automatic precharge, includes CONCURRENT Auto Precharge  
Mode and controlled Precharge.  
Copyright © 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its  
products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services  
described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information  
and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or  
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or  
effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to  
its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
1
www.issi.com - dram@issi.com  
Rev. A | November 2015  
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IS42RM32200M-6BLI ISSI

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IS42RM32400F-75BLI ISSI

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 		All pins are compatible with LVCMOS interface
IS42RM32400G-6BLI ISSI

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 		1M x 32Bits x 4Banks Mobile Synchronous DRAM

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