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IS42RM16800H-75BLI PDF预览

IS42RM16800H-75BLI

更新时间: 2024-11-25 01:22:35
品牌 Logo 应用领域
美国芯成 - ISSI 动态存储器内存集成电路
页数 文件大小 规格书
34页 854K
描述
2M x 16Bits x 4Banks Mobile Synchronous DRAM

IS42RM16800H-75BLI 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:TFBGA,Reach Compliance Code:compliant
ECCN代码:EAR99风险等级:5.62
访问模式:FOUR BANK PAGE BURST最长访问时间:6 ns
其他特性:AUTO/SELF REFRESHJESD-30 代码:S-PBGA-B54
长度:8 mm内存密度:134217728 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:54字数:8388608 words
字数代码:8000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:8MX16封装主体材料:PLASTIC/EPOXY
封装代码:TFBGA封装形状:SQUARE
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH峰值回流温度(摄氏度):NOT SPECIFIED
座面最大高度:1.2 mm自我刷新:YES
最大供电电压 (Vsup):3 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:BALL端子节距:0.8 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8 mmBase Number Matches:1

IS42RM16800H-75BLI 数据手册

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IS42/45SM/RM/VM16800H  
2M x 16Bits x 4Banks Mobile Synchronous DRAM  
Description  
These IS42/45SM/RM/VM16800H are mobile 134,217,728 bits CMOS Synchronous DRAM organized as 4 banks of 2,097,152 words x 16  
bits. These products are offering fully synchronous operation and are referenced to a positive edge of the clock. All inputs and outputs  
are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve high bandwidth. All input  
and output voltage levels are compatible with LVCMOS.  
Features  
. JEDEC standard 3.3V, 2.5V, 1.8V power supply  
Auto refresh and self refresh  
Internal 4 banks operation  
Burst Read Single Write operation  
Special Function Support  
All pins are compatible with LVCMOS interface  
4K refresh cycle / 64ms  
PASR(Partial Array Self Refresh)  
Programmable Burst Length and Burst Type  
1, 2, 4, 8 or Full Page for Sequential Burst  
4 or 8 for Interleave Burst  
Auto TCSR(Temperature Compensated Self Refresh)  
Programmable Driver Strength Control  
Full Strength or 1/2, 1/4, of Full Strength  
Deep Power Down Mode  
Programmable CAS Latency : 2,3 clocks  
All inputs and outputs referenced to the positive edge of the  
system clock  
Automatic precharge, includes CONCURRENT Auto Precharge  
Mode and controlled Precharge  
Data mask function by DQM  
Copyright © 2015 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its  
products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services  
described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information  
and before placing orders for products.  
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or  
malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or  
effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to  
its satisfaction, that:  
a.) the risk of injury or damage has been minimized;  
b.) the user assume all such risks; and  
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances  
1
www.issi.com - DRAM@issi.com  
Rev. A | November 2015  

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