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IS24C128-2ZI

更新时间： 2024-09-20 21:15:03
品牌 Logo 应用领域
美国芯成 - ISSI 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
12页 49K
描述
EEPROM, 16KX8, Serial, CMOS, PDSO14, TSSOP-14

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中文翻译

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IS24C128-2ZI 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：TSSOP包装说明：TSSOP-14
针数：14Reach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.32.00.51
风险等级：5.89最大时钟频率 (fCLK)：0.1 MHz
JESD-30 代码：R-PDSO-G14JESD-609代码：e0
长度：5 mm内存密度：131072 bit
内存集成电路类型：EEPROM内存宽度：8
功能数量：1端子数量：14
字数：16384 words字数代码：16000
工作模式：SYNCHRONOUS最高工作温度：85 °C
最低工作温度：-40 °C组织：16KX8
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行：SERIAL峰值回流温度（摄氏度）：240
认证状态：Not Qualified座面最大高度：1.2 mm
串行总线类型：I2C最大供电电压 (Vsup)：5.5 V
最小供电电压 (Vsup)：1.8 V标称供电电压 (Vsup)：2.5 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.65 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：4.4 mm最长写入周期时间 (tWC)：10 ms
Base Number Matches：1

IS24C128-2ZI 数据手册

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®
IS24C128  
ISSI  
131,072-bit 2-WIRE SERIAL  
CMOS EEPROM  
PRELIMINARY INFORMATION  
OCTOBER 2002  
DESCRIPTION  
FEATURES  
The IS24C128 is an electrically erasable PROM  
device that uses the standard 2-wire interface for  
communications. The IS24C128 contains a memory  
array of 128K-bits (16,384 x 8), and is further  
subdivided into 256 pages of 64 bytes each for page-  
write mode. This EEPROM is offered in wide operating  
voltages of 1.8V to 5.5V (IS24C128-2) and 2.5V to  
5.5V (IS24C128-3) to be compatible with most  
application voltages. ISSI designed the IS24C128 to be  
a low-cost and low-power 2-wire EEPROM solution.  
The devices are packaged in 8-pin PDIP, 8-pin SOIC,  
and 14-pin TSSOP.  
• Organization:  
– 16K-bit x 8-bit  
• 64-Byte Page Write Buffer  
• Two-Wire Serial Interface  
– Bi-directional data transfer protocol  
• Low Power CMOS Technology  
– Active Current less than 2 mA (5V)  
– Standby Current less than 5 µA (5V)  
– Standby Current less than 2 µA (2.5V)  
• Low Voltage Operation  
The IS24C128 maintains compatibility with the popular  
2-wire bus protocol, so it is easy to design into  
applications implementing this bus type. The simple  
bus consists of the Serial Clock wire (SCL) and the  
Serial Data wire (SDA). Using the bus, a Master  
device such as a microcontroller is usually connected  
to one or more Slave devices such as the IS24C128.  
The bit stream over the SDA line includes a series of  
bytes, which identifies a particular Slave device, an  
instruction, an address within that Slave device, and a  
series of data, if appropriate. The IS24C128 has a  
Write Protect pin (WP) to allow blocking of any write  
instruction transmitted over the bus.  
– IS24C128-2: Vcc = 1.8V to 5.5V  
– IS24C128-3: Vcc = 2.5V to 5.5V  
• 400 KHz (I2C Protocol) Compatibility  
• Hardware Data Protection  
– Write Protect pin  
• Sequential Read Feature  
• Filtered Inputs for Noise Suppression  
• Self time Write cycle with auto clear  
– 5 ms @ 2.5V  
• HighReliability  
– Endurance: 100,000 Cycles  
– Data Retention: 40 Years  
• Commercial and Industrial temperature ranges  
• 8-pin PDIP, 8-pin SOIC, and 14-pin TSSOP  
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI  
assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device  
specification before relying on any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
PRELIMINARYINFORMATION Rev.00A  
1
10/10/02  
1234567...12

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