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IDT74LVCH16501APF8 PDF预览

IDT74LVCH16501APF8

更新时间: 2024-11-05 20:58:35
品牌 Logo 应用领域
艾迪悌 - IDT 光电二极管输出元件逻辑集成电路电视
页数 文件大小 规格书
7页 72K
描述
Registered Bus Transceiver, LVC/LCX/Z Series, 1-Func, 18-Bit, True Output, CMOS, PDSO56, TVSOP-56

IDT74LVCH16501APF8 技术参数

生命周期:Obsolete零件包装代码:SSOP
包装说明:TSSOP,针数:56
Reach Compliance Code:unknown风险等级:5.84
其他特性:WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION系列:LVC/LCX/Z
JESD-30 代码:R-PDSO-G56JESD-609代码:e0
长度:11.3 mm负载电容(CL):50 pF
逻辑集成电路类型:REGISTERED BUS TRANSCEIVER位数:18
功能数量:1端口数量:2
端子数量:56最高工作温度:85 °C
最低工作温度:-40 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH传播延迟(tpd):5.3 ns
认证状态:Not Qualified座面最大高度:1.2 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:GULL WING
端子节距:0.4 mm端子位置:DUAL
宽度:4.4 mmBase Number Matches:1

IDT74LVCH16501APF8 数据手册

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3.3V CMOS 18-BIT  
IDT74LVCH16501A  
REGISTERED BUS TRANSCEIVER  
WITH 5V TOLERANT I/O  
AND BUS-HOLD  
FEATURES:  
DESCRIPTION:  
• Typical tSK(o) (Output Skew) < 250ps  
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using  
machine model (C = 200pF, R = 0)  
This 18-bit registered transceiver is built using advanced dual metal  
CMOS technology. This high-speed, low power 18-bit registered bus  
transceivercombinesD-typelatchesandD-typeflip-flopstoallowdataflow  
in transparent latched and clocked modes. Data flow in each direction is  
controlled by output-enable (OEAB and OEBA), latch enable (LEAB and  
LEBA) and clock (CLKAB and CLKBA) inputs. For A-to-B data flow, the  
device operates in transparent mode when LEAB is high. When LEAB is  
low,theAdataislatchedifCLKABisheldatahighorlowlogiclevel. IfLEAB  
islow,theAbusdataisstoredinthelatch/flip-floponthelow-to-hightransition  
of CLKAB. OEAB performs the output enable function on the B port. Data  
flow from B port to A port is similar but requires using OEBA, LEBA and  
CLKBA.Flow-throughorganizationofsignalpinssimplifieslayout.Allinputs  
are designed with hysteresis for improved noise margin.  
• VCC = 3.3V ± 0.3V, Normal Range  
• VCC = 2.7V to 3.6V, Extended Range  
• CMOS power levels (0.4µ W typ. static)  
• All inputs, outputs, and I/O are 5V tolerant  
• Supports hot insertion  
• Available in SSOP, TSSOP, and TVSOP packages  
DRIVE FEATURES:  
• High Output Drivers: ±24mA  
• Reduced system switching noise  
TheLVCH16501Ahasbeendesignedwitha ±24mAoutputdriver. This  
driver is capable of driving a moderate to heavy load while maintaining  
speedperformance.  
The LVCH16501A has “bus-hold” which retains the inputs’ last state  
whenevertheinputgoestoahighimpedance. Thispreventsfloatinginputs  
and eliminates the need for pull-up/down resistors.  
APPLICATIONS:  
• 5V and 3.3V mixed voltage systems  
• Data communication and telecommunication systems  
FUNCTIONALBLOCKDIAGRAM  
1
OEAB  
30  
CLKBA  
28  
LEBA  
27  
OEBA  
55  
CLKAB  
2
LEAB  
C
C
D
54  
3
B1  
A1  
D
C
D
C
D
TO 17 OTHER CHANNELS  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
OCTOBER 1999  
1
© 1999 Integrated Device Technology, Inc.  
DSC-3688/1  

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