IDT74ALVCH16260PAG

更新时间： 2024-09-10 13:08:43

品牌	Logo	应用领域
艾迪悌 - IDT		锁存器输出元件
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IDT74ALVCH16260PAG 数据手册

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IDT74ALVCH16260

INDUSTRIALTEMPERATURERANGE

3.3VCMOS12-BITTO24-BITMULTIPLEXEDD-TYPELATCH

3.3V CMOS 12-BIT TO 24-BIT

IDT74ALVCH16260

MULTIPLEXED D-TYPE LATCH

WITH 3-STATE OUTPUTS

AND BUS-HOLD

FEATURES:

DESCRIPTION:

• 0.5 MICRON CMOS Technology

This12-bitto24-bitmultiplexedD-typelatchisbuiltusingadvanceddual

metalCMOStechnology.TheALVCH16260isusedinapplicationsinwhich

twoseparatedatapathsmustbemultiplexedonto,ordemultiplexedfrom,a

singledatapath.Typicalapplicationsincludemultiplexingand/ordemultiplexing

addressanddatainformationinmicroprocessororbus-interfaceapplications.

Thisdevicealsoisusefulinmemoryinterleavingapplications.

• Typical tSK(o) (Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• VCC = 3.3V ± 0.3V, Normal Range

• VCC = 2.7V to 3.6V, Extended Range

• VCC = 2.5V ± 0.2V

• CMOS power levels (0.4µ W typ. static)

• Rail-to-Rail output swing for increased noise margin

• Available in SSOP and TSSOP packages

Three12-bitI/Oports(A1-A12,1B1-1B12,and2B1-2B12)areavailable

foraddressand/ordatatransfer.Theoutput-enable(OE1B,OE2B,andOEA)

inputs control the bus transceiver functions. The OE1B and OE2B control

signalsalsoallowbankcontrolintheA-to-Bdirection. Addressand/ordata

informationcanbestoredusingtheinternalstoragelatches.Thelatch-enable

(LE1B,LE2B,LEA1B,andLEA2B)inputsareusedtocontroldatastorage.

Whenthelatch-enableinputishigh,thelatchistransparent.Whenthelatch-

enableinputgoeslow,thedatapresentattheinputsislatchedandremains

latcheduntilthelatch-enableinputisreturnedhigh.

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Suitable for heavy loads

The ALVCH16260 has been designed with a ±24mA output driver. This

driveriscapableofdrivingamoderatetoheavyloadwhilemaintainingspeed

performance.

APPLICATIONS:

• 3.3V high speed systems

• 3.3V and lower voltage computing systems

The ALVCH16260 has “bus-hold” which retains the inputs’ last state

whenevertheinputgoestoahighimpedance.Thispreventsfloatinginputs

andeliminatestheneedforpull-up/downresistors.

FUNCTIONALBLOCKDIAGRAM

OE1B

A-1B

LEA1B

1B1:12

LATCH

LE1B

1B-A

LATCH

SEL

OEA

A1:12

2B-A

LATCH

LE2B

A-2B

LATCH

2B1:12

LEA2B

OE2B

TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.

INDUSTRIAL TEMPERATURE RANGE

JANUARY 2004

DSC-4737/2

12 3 4 5 6 7

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IDT74ALVCH16260PAG 替代型号

型号	品牌	替代类型	描述	数据表
IDT74ALVCH16260PA	IDT	功能相似	3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD

与IDT74ALVCH16260PAG相关器件

型号	品牌	获取价格	描述	数据表
IDT74ALVCH16260PAG8	IDT	获取价格	Multiplexer And Demux/Decoder, ALVC/VCX/A Series, 12-Func, 1 Line Input, 2 Line Output, Tr
IDT74ALVCH16260PF	ETC	获取价格	Bus Exchanger
IDT74ALVCH16260PV	IDT	获取价格	3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16269PA	ETC	获取价格	Bus Exchanger
IDT74ALVCH16269PA8	IDT	获取价格	Bus Exchanger, ALVC/VCX/A Series, 2-Func, 12-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH
IDT74ALVCH16269PF	ETC	获取价格	Bus Exchanger
IDT74ALVCH16269PV	ETC	获取价格	Bus Exchanger
IDT74ALVCH16269PV8	IDT	获取价格	Bus Exchanger, ALVC/VCX/A Series, 2-Func, 12-Bit, True Output, CMOS, PDSO56, 0.635 MM PITC
IDT74ALVCH16270	IDT	获取价格	3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16270PA	IDT	获取价格	3.3V CMOS 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS AND BUS-HOLD

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