Datasheet > 逻辑 > 总线驱动器/收发器> IDT74ALVCH162721

IDT74ALVCH162721

更新时间： 2024-09-13 22:57:23

品牌	Logo	应用领域
艾迪悌 - IDT		触发器输出元件
页数	文件大小	规格书
6页	114K
描述
3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD

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IDT74ALVCH162721 数据手册

IDT74ALVCH162721

3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

EXTENDED COMMERCIAL TEMPERATURE RANGE

3.3V CMOS 20-BIT

IDT74ALVCH162721

FLIP-FLOP WITH 3-STATE

OUTPUTS AND BUS-HOLD

DESCRIPTION:

FEATURES:

This 20-bit flip-flop is built using advanced dual metal CMOS technol-

–

0.5 MICRON CMOS Technology

Typicalt^SK(0)(Output Skew) < 250ps

ESD > 2000V per MIL-STD-883, Method 3015;

> 200V using machine model (C = 200pF, R = 0)

0.635mm pitch SSOP, 0.50mm pitch TSSOP,

and 0.40mm pitch TVSOP packages

ogy. The 20 flip-flops of the ALVCH162721 are edge-triggered D-type

flip-flops with qualified clock storage. On the positive transition of the

clock (CLK) input, the device provides true data at the Q outputs if the

clock-enable (CLKEN) input is low. If CLKEN is high, no data is stored.

–

A buffered output-enable (OE) input places the 20 outputs in either a

normal logic state (high or low) or a high-impedance state. In the high-

impedance state, the outputs neither load nor drive the bus lines

significantly. The high-impedance state and increased drive provide the

capability to drive bus lines without need for interface or pullup compo-

nents. OE does not affect the internal operation of the flip-flops. Old data

can be retained or new data can be entered while the outputs are in the

high-impedance state.

–

Extended commercial range of – 40°C to + 85°C

V^CC= 3.3V ± 0.3V, Normal Range

V^CC= 2.7V to 3.6V, Extended Range

V^CC= 2.5V ± 0.2V

CMOS power levels (0.4µW typ. static)

Rail-to-Rail output swing for increased noise margin

Drive Features for ALVCH162721:

–

Balanced Output Drivers: ±12mA

Low switching noise

The ALVCH162721 has series resistors in the device output structure

which will significantly reduce line noise when used with light loads. This

driver has been designed to drive ±12mA at the designated threshold

levels.

APPLICATIONS:

• 3.3V High Speed Systems

• 3.3V and lower voltage computing systems

The ALVCH162721 has “bus-hold” which retains the inputs’ last state

whenever the input goes to a high impedance. This prevents floating

inputs and eliminates the need for pull-up/down resistor.

Functional Block Diagram

CLK

CLKEN

Q¹

D¹

To 19 Other Channels

EXTENDED COMMERCIAL TEMPERATURE RANGE

MARCH1999

1999 Integrated Device Technology, Inc.

DSC-4566/-

12 3 4 5 6

中文翻译

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与IDT74ALVCH162721相关器件

型号	品牌	获取价格	描述	数据表
IDT74ALVCH162721PA	IDT	获取价格	3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH162721PA8	IDT	获取价格	Bus Driver, ALVC/VCX/A Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, TSSOP-56
IDT74ALVCH162721PAG	IDT	获取价格	Bus Driver, ALVC/VCX/A Series, 1-Func, 20-Bit, True Output, CMOS, PDSO56, TSSOP-56
IDT74ALVCH162721PF	IDT	获取价格	3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH162721PV	IDT	获取价格	3.3V CMOS 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS AND BUS-HOLD
IDT74ALVCH16276PA	ETC	获取价格	Bus Exchanger
IDT74ALVCH16276PA8	IDT	获取价格	Bus Exchanger, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH
IDT74ALVCH16276PF	ETC	获取价格	Bus Exchanger
IDT74ALVCH16276PF8	IDT	获取价格	Bus Exchanger, ALVC/VCX/A Series, 1-Func, 12-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH
IDT74ALVCH16276PV	ETC	获取价格	Bus Exchanger

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