Datasheet > IDT70P3307

IDT70P3307

更新时间： 2024-09-15 04:58:19

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
20页	883K
描述
1024K/512K x18 SYNCHRONOUS DUAL QDR-II

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中文翻译

获取价格

数据手册

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IDT70P3307 数据手册

PRELIMINARY DATASHEET

IDT70P3307

1024K/512K x18

SYNCHRONOUS

DUAL QDR-II

IDT70P3337

Features

– Four word transfers per clock cycle per port (four word bursts

on 2 ports)

◆

18Mb Density (1024K x 18)

◆

Port Enable pins (E0,E1) for depth expansion

Dual Echo Clock Output with DLL-based phase alignment

High Speed Transceiver Logic inputs that can be scaled to

receive signals from 1.4V to 1.9V

– Also available 9Mb Density (512K x 18)

QDR-II x 18 Burst-of-2 Interface

– Commercial: 233MHz, 250MHz

◆

Separate, Independent Read and Write Data Ports

– Supports concurrent transactions

◆

Scalable output drivers

– Drives HSTL, 1.8V TTL or any voltage level from 1.4V to 1.9V

– Output impedance adjustable from 35 ohms to 70 ohms

1.8V Core Voltage (VDD)

◆

Dual Echo Clock Output

Two-Word Burst on all DPRAM accesses

DDR (Double Data Rate) Multiplexed Address Bus

– One Read and One Write request per clock cycle

DDR (Double Data Rate) Data Buses

– Four word burst data (Two Read and Two Write) per clock on

each port

◆

576-ball Flip Chip BGA (25mm x 25mm, 1.0mm ball pitch)

JTAG Interface - IEEE 1149.1 Compliant

◆

Functional Block Diagram

VREFL

VREFR

P[1:0]

R[1:0]

L[1:0]

LEFT PORT

DATA

RIGHT PORT

DATA

AND LOGIC

0L- D1 7 L

0R-

D17 R

WRITE DRIVER

(1)

ZQL

ZQR

0L-

1 7 L

0R- Q1 7 R

1024/512K x 18

MEMORY

ARRAY

CQL, CQL

CQR, CQR

(2)

0R- 18R

(2)

0L- A18L

, C

^ORK

, K

^ORK

, KL

LEFT PORT

ADDRESS

AND LOGIC

RIGHT PORT

ADDRESS

AND LOGIC

ADDRESS DECODE

BW0R- BW1R

BW0L- BW1 L

TCK

TMS

TRST

TDI

6725 drw01

JTAG

VREFR

VREFL

TDO

NOTES:

1. Input pin to adjust the device outputs to the system data bus impedance.

2. Address A18 is a INC for IDT70P3337. Disabled input pin (Diode tied to VDD and VSS).

July 16, 2007

DSC-6725/1

©2007 Integrated Device Technology, Inc. All rights reserved. Advanced Datasheet for informational purposes only. Product specifications subject to change without notice. NOT AN OFFER FOR SALE The information

presented herein is subject to a Non-Disclosure Agreement (NDA) and is for planning purposes only. Nothing contained in this presentation, whether verbal or written, is intended as, or shall have the effect of, a sale

or an offer for sale that creates a contractual power of acceptance. "QDR SRAMs and Quad Data Rate RAMs comprise a new family of products developed by Cypress Semicondor, IDT, and Micron Tecnology, Inc."

12 3 4 5 6 7...20

中文翻译

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与IDT70P3307相关器件

型号	品牌	获取价格	描述	数据表
IDT70P3307S233RM	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3307S233RMI	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3307S250RM	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3307S250RMI	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3337	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3337S233RM	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3337S233RMI	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3337S250RM	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P3337S250RMI	IDT	获取价格	1024K/512K x18 SYNCHRONOUS DUAL QDR-II
IDT70P34	IDT	获取价格	HIGH-SPEED 1.8V 8/4K x 18 DUAL-PORT, 8/4K x 16 DUAL-PORT STATIC RAM

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