Datasheet > ICSSSTUA32S869BH-T

ICSSSTUA32S869BH-T

更新时间： 2024-11-14 08:01:35

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
18页	290K
描述
Interface Circuit

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中文翻译

获取价格

数据手册

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ICSSSTUA32S869B

Advance Information

Integrated

Circuit

Systems,Inc.

14-Bit Configurable Registered Buffer for DDR2

Pin Configuration

Recommended Application:

•

DDR2 Memory Modules

•

Provides complete DDR DIMM solution with

ICS97U877

Ideal for DDR2 400, 533 and 667

•

Product Features:

•

14-bit 1:2 registered buffer with parity check

functionality

Supports SSTL_18 JEDEC specification on data

inputs and outputs

50% more dynamic driver strength than standard

SSTU32864

Supports LVCMOS switching levels on C1 and

RESET# inputs

Low voltage operation

V_DD= 1.7V to 1.9V

Available in 150 BGA package

Green packages available

•

150 Ball BGA

(Top View)

FunctionalityTruthTable

Inputs

Outputs

QCS#

Dn,

DODT,

DCKE

QODT,

QCKE

RESET#

DCS#

CSR#

CK#

↑

↓

↑

L or H

↑

↓

L or H

↓

↑

↓

L or H

↑

↓

L or H

↑

↓

↑

L or H

↓

L or H

X or

floating

X or

floating

X or

floating

X or

floating

X or

floating

1173—10/28/05

ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals.

ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners.

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