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ICS87158AGLFT PDF预览

ICS87158AGLFT

更新时间: 2024-11-16 20:02:27
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
17页 354K
描述
Low Skew Clock Driver, 87158 Series, 6 True Output(s), 0 Inverted Output(s), PDSO48, ROHS COMPLIANT, 6.10 X 12.50 MM, 0.92 MM HEIGHT, MO-153, TSSOP-48

ICS87158AGLFT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:ROHS COMPLIANT, 6.10 X 12.50 MM, 0.92 MM HEIGHT, MO-153, TSSOP-48针数:48
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.84系列:87158
输入调节:DIFFERENTIALJESD-30 代码:R-PDSO-G48
JESD-609代码:e3长度:12.5 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER功能数量:1
反相输出次数:端子数量:48
实输出次数:6最高工作温度:85 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260传播延迟(tpd):4 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.1 ns
座面最大高度:1.2 mm最大供电电压 (Vsup):3.465 V
最小供电电压 (Vsup):3.135 V标称供电电压 (Vsup):3.3 V
表面贴装:YES温度等级:OTHER
端子面层:Matte Tin (Sn)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:6.1 mm
Base Number Matches:1

ICS87158AGLFT 数据手册

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ICS87158  
1-TO-6, LVPECL-TO-HCSL/LVCMOS  
÷1, ÷2, ÷4 CLOCK GENERATOR  
GENERAL DESCRIPTION  
FEATURES  
The ICS87158 is a high performance 1-to-6 LVPECL-to-  
HCSL/LVCMOS ClockGenerator. The ICS87158 has one  
differential input (which can accept LVDS, LVPECL, LVHSTL,  
SSTL, HCSL), six differential HCSL output pairs and two  
complementary LVCMOS/LVTTLoutputs. The six HCSL  
output pairs can be individually configured for divide-by-1, 2,  
and 4 or high impedance by use of select pins. The two  
complementary LVCMOS/LVTTL outputs can be configured  
for divide by 2, divide by 4, high impedance, or driven low for  
low power operation.  
Six HCSL outputs  
Two LVCMOS/LVTTL outputs  
One Differential LVPECL clock input pair  
PCLK, nPCLK supports the following input types:  
LVDS, LVPECL, LVHSTL, SSTL, HCSL  
Maximum output frequency: 600MHz (maximum)  
Output skew: 100ps (maximum)  
Propagation delay: 4ns (maximum)  
3.3V operating supply  
®
The primary use of the ICS87158 is in Intel E8870 chipsets  
®
that use Intel Pentium 4 processors. The ICS87158 converts  
the differential clock from the main system clock into HCSL  
clocks used by Intel Pentium 4 processors. However, the  
ICS87158 is a highly flexible, general purpose device that  
operates up to 600MHz and can be used in any situation where  
Differential-to-HCSL translation is required.  
0°C to 85°C ambient operating temperature  
®
Available in both standard and lead-free RoHS compliant  
packages  
Industrial temperature information available upon request  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
GND  
VDD  
VDD_R  
PCLK  
nPCLK  
GND_R  
VDD_M  
MREF  
nMREF  
GND_M  
VDD  
GND  
VDD_L  
VDD  
GND_L  
SEL_T  
MULT_0  
MULT_1  
VDD_L  
1
2
3
4
5
6
7
8
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VDD  
GND_H  
VDD_H  
MULT_0  
CURRENT  
MULT_1  
ADJUST  
VDD  
HOST_P1  
HOST_N1  
GND_H  
HOST_P2  
HOST_N2  
VDD_H  
HOST_P3  
HOST_N3  
GND_H  
HOST_P4  
HOST_N4  
VDD_H  
HOST_P5  
HOST_N5  
GND_H  
HOST_P6  
HOST_N6  
VDD_H  
IREF  
-
HOST_P1  
HOST_N1  
GND_H  
VDD  
+
÷1,2,4  
PWR_DWN#  
SEL_T  
9
HOST_P6  
HOST_N6  
GND_H  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
VDD  
HOST_P2  
HOST_N2  
GND_H  
VDD  
÷1,2,4  
PCLK  
nPCLK  
HOST_P3  
GND_L  
SEL_A  
SEL_B  
SEL_U  
PWR_DWN#  
HOST_N3  
GND_H  
VDD  
IREF  
GND_I  
VDD_I  
HOST_P4  
HOST_N4  
GND_H  
VDD  
48-Lead TSSOP  
6.1mm x 12.5mm x .92mm body package  
HOST_P5  
HOST_N5  
GND_H  
G Package  
Top View  
SEL_A  
SEL_B  
SEL_U  
DIVIDER  
CONTROL  
VDD  
48-Lead SSOP  
7.5mm x 15.9mm x 2.3mm body package  
F Package  
MREF  
nMREF  
GND_H  
÷2,4  
Top View  
87158AG  
www.idt.com  
REV. C JULY 25, 2010  
1

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