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ICS87159AGT PDF预览

ICS87159AGT

更新时间: 2024-11-16 20:09:43
品牌 Logo 应用领域
艾迪悌 - IDT 驱动光电二极管逻辑集成电路
页数 文件大小 规格书
16页 199K
描述
Low Skew Clock Driver, 87159 Series, 8 True Output(s), 0 Inverted Output(s), PDSO56, 6.10 X 14 MM, 0.92 MM HEIGHT, MO-153, TSSOP-56

ICS87159AGT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP, TSSOP56,.3,20针数:56
Reach Compliance Code:not_compliantHTS代码:8542.39.00.01
风险等级:5.29系列:87159
输入调节:DIFFERENTIALJESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:14 mm
逻辑集成电路类型:LOW SKEW CLOCK DRIVER最大频率@ Nom-Sup:600000000 Hz
湿度敏感等级:1功能数量:1
反相输出次数:端子数量:56
实输出次数:8最高工作温度:85 °C
最低工作温度:输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP56,.3,20封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):240
电源:3.3 V传播延迟(tpd):3.6 ns
认证状态:Not QualifiedSame Edge Skew-Max(tskwd):0.11 ns
座面最大高度:1.2 mm子类别:Prescaler/Multivibrators
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
温度等级:OTHER端子面层:Tin/Lead (Sn85Pb15)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:20
宽度:6.1 mmBase Number Matches:1

ICS87159AGT 数据手册

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ICS87159  
1-TO-8 LVPECL-TO-HCSL  
÷1, ÷2, ÷4 CLOCK GENERATOR  
Integrated  
Circuit  
Systems, Inc.  
GENERAL DESCRIPTION  
FEATURES  
The ICS87159 is a high performance 1-to-8 Dif-  
Eight HCSL outputs  
Two LVCMOS outputs  
LVPECL clock input pair  
ICS  
HiPerClockS™  
ferential-to-HCSL/LVCMOS Clock Generator  
and is a member of the HiPerClockS™ family of  
High Performance Clock Solutions from ICS.The  
ICS87159 has one differential input (which can  
accept LVDS, LVPECL, LVHSTL, SSTL, HCSL),  
PCLK, nPCLK supports the following input types:  
LVDS, LVPECL, LVHSTL, SSTL, HCSL  
eight differential HCSL output pairs and two complementary  
LVCMOS/LVTTL outputs.The eight HCSL output pairs can be  
configured for divide-by-1, 2, and 4 or high impedance by  
use of select pins. The two complementary LVCMOS/LVTTL  
outputs can be configured for divide by 2, divide by 4, high  
impedance, or driven low for low power operation.  
Maximum output frequency: 600MHz  
Output skew: 110ps (maximum)  
Propagation delay: 3.6ns (maximum)  
3.3V operating supply  
®
The primary use of the ICS87159 is in *Intel E8870  
®
chipsets that use *Intel Pentium 4 processors. The  
0°C to 85°C ambient operating temperature  
Industrial temperature information available upon request  
ICS87159 converts the differential clock from the main sys-  
tem clock into HCSL clocks used by *Intel Pentium 4 pro-  
cessors. However, the ICS87159 is a highly flexible, gen-  
eral purpose device that operates up to 600MHz and can  
be used in any situation where Differential-to-HCSL trans-  
lation is required.  
®
Available in both standard and lead-free RoHS compliant  
packages  
BLOCK DIAGRAM  
PIN ASSIGNMENT  
MULT_0  
CURRENT  
GND_H  
VDD_H  
GND  
1
2
3
56  
55  
54  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
HOST_P1  
HOST_N1  
VDD  
GND_H  
VDD_H  
HOST_P2  
HOST_N2  
GND_H  
HOST_P3  
HOST_N3  
VDD_H  
HOST_P4  
HOST_N4  
GND_H  
HOST_P5  
HOST_N5  
VDD_H  
HOST_P6  
HOST_N6  
GND_H  
HOST_P7  
HOST_N7  
VDD_H  
IREF  
GND_I  
VDD_I  
HOST_P8  
HOST_N8  
MULT_1  
ADJUST  
VDD  
IREF  
-
+
VDD  
4
HOST_P2  
HOST_N2  
GND_H  
÷1  
÷2  
÷4  
VDD_R  
PCLK  
5
6
PWR_DWN#  
SEL_T  
nPCLK  
GND_R  
VDD_M  
MREF  
nMREF  
GND_M  
7
8
9
VDD  
HOST_P7  
HOST_N7  
GND_H  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
VDD  
VDD  
÷1  
÷2  
÷4  
HOST_P1  
HOST_N1  
GND_H  
GND  
VDD_L  
VDD  
GND_L  
SEL_T  
MULT_0  
MULT_1  
VDD_L  
PCLK  
nPCLK  
VDD  
HOST_P3  
HOST_N3  
GND_H  
VDD  
GND_L  
SEL_A  
SEL_B  
HOST_P4  
HOST_N4  
GND_H  
SEL_U  
PWR_DWN#  
VDD_H  
VDD  
HOST_P5  
HOST_N5  
GND_H  
SEL_A  
SEL_B  
SEL_U  
GND_H  
DIVIDER  
VDD  
CONTROL  
HOST_P6  
HOST_N6  
GND_H  
56-Lead TSSOP  
6.1mm x 14.0mm x .92mm body package  
G Package  
VDD  
Top View  
HOST_P8  
HOST_N8  
GND_H  
VDD  
MREF  
nMREF  
GND_H  
÷2  
÷4  
87159AG  
www.icst.com/products/hiperclocks.html  
REV.A JANUARY 17, 2006  
1

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