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HY5W2A6CSF-S PDF预览

HY5W2A6CSF-S

更新时间: 2024-01-05 15:02:58
品牌 Logo 应用领域
其他 - ETC 动态存储器
页数 文件大小 规格书
24页 407K
描述
SDRAM|4X2MX16|CMOS|BGA|54PIN|PLASTIC

HY5W2A6CSF-S 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:TFBGA, BGA54,9X9,32针数:54
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.84
访问模式:FOUR BANK PAGE BURST最长访问时间:7 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):100 MHz
I/O 类型:COMMON交错的突发长度:1,2,4,8
JESD-30 代码:R-PBGA-B54JESD-609代码:e1
长度:10.5 mm内存密度:134217728 bit
内存集成电路类型:SYNCHRONOUS DRAM内存宽度:16
功能数量:1端口数量:1
端子数量:54字数:8388608 words
字数代码:8000000工作模式:SYNCHRONOUS
最高工作温度:85 °C最低工作温度:-25 °C
组织:8MX16输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TFBGA
封装等效代码:BGA54,9X9,32封装形状:RECTANGULAR
封装形式:GRID ARRAY, THIN PROFILE, FINE PITCH电源:1.8/2.5,2.5 V
认证状态:Not Qualified刷新周期:4096
座面最大高度:1.07 mm自我刷新:YES
连续突发长度:1,2,4,8,FP最大待机电流:0.0005 A
子类别:DRAMs最大压摆率:0.125 mA
最大供电电压 (Vsup):2.7 V最小供电电压 (Vsup):2.3 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:0.8 mm端子位置:BOTTOM
宽度:8.3 mmBase Number Matches:1

HY5W2A6CSF-S 数据手册

 浏览型号HY5W2A6CSF-S的Datasheet PDF文件第18页浏览型号HY5W2A6CSF-S的Datasheet PDF文件第19页浏览型号HY5W2A6CSF-S的Datasheet PDF文件第20页浏览型号HY5W2A6CSF-S的Datasheet PDF文件第22页浏览型号HY5W2A6CSF-S的Datasheet PDF文件第23页浏览型号HY5W2A6CSF-S的Datasheet PDF文件第24页 
HY5W2A6C(L/S)F / HY57W2A1620HC(L/S)T  
HY5W26CF / HY57W281620HCT  
Special Operation for Low Power Consumption  
Deep Power Down Mode  
Deep Power Down Mode is an operating mode to achieve maximum power reduction by cutting the power of the whole mem-  
ory array of the devices.  
Data will not be retained once the device enters Deep Power Down Mode.  
Full initialization is required when the device exits from Deep Power Down Mode.  
Truth Table  
Current State  
Idle  
CS  
Command  
CKEn-1  
CKEn  
RAS  
CAS  
WE  
Deep Power  
Down Entry  
H
L
L
H
H
L
Deep Power  
Down  
Deep Power  
Down Exit  
L
H
X
X
X
X
Deep Power Down Mode Entry  
The Deep Power Down Mode is entered by having /CS and /WE held low with /RAS and /CAS high at the rising edge of the  
clock, while CKE is low. The following diagram illustrates deep power down mode entry.  
CLK  
CKE  
CS  
RAS  
CAS  
WE  
tRP  
Precharge  
if needed  
Deep Power Down Entry  
Rev. 1.3 / Dec. 01  
22  

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