Datasheet > HY5Y5A6DLF-HF

HY5Y5A6DLF-HF

更新时间： 2024-11-09 19:51:43

品牌	Logo	应用领域
海力士 - HYNIX		时钟动态存储器内存集成电路
页数	文件大小	规格书
23页	276K
描述
Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 0.80 MM PITCH, FBGA-54

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技术参数
数据手册

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HY5Y5A6DLF-HF 技术参数

生命周期：	Obsolete	零件包装代码：	BGA
包装说明：	TFBGA, BGA54,9X9,32	针数：	54
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.24	风险等级：	5.82
访问模式：	FOUR BANK PAGE BURST	最长访问时间：	5.4 ns
其他特性：	AUTO/SELF REFRESH	最大时钟频率 (fCLK)：	133 MHz
I/O 类型：	COMMON	交错的突发长度：	1,2,4,8
JESD-30 代码：	R-PBGA-B54	JESD-609代码：	e1
长度：	13.5 mm	内存密度：	268435456 bit
内存集成电路类型：	SYNCHRONOUS DRAM	内存宽度：	16
功能数量：	1	端口数量：	1
端子数量：	54	字数：	16777216 words
字数代码：	16000000	工作模式：	SYNCHRONOUS
最高工作温度：	70 °C	最低工作温度：	-25 °C
组织：	16MX16	输出特性：	3-STATE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TFBGA
封装等效代码：	BGA54,9X9,32	封装形状：	RECTANGULAR
封装形式：	GRID ARRAY, THIN PROFILE, FINE PITCH	电源：	3/3.3 V
认证状态：	Not Qualified	刷新周期：	8192
座面最大高度：	1.1 mm	自我刷新：	YES
连续突发长度：	1,2,4,8,FP	最大待机电流：	0.00035 A
子类别：	DRAMs	最大压摆率：	0.18 mA
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	OTHER
端子面层：	TIN SILVER COPPER	端子形式：	BALL
端子节距：	0.8 mm	端子位置：	BOTTOM
宽度：	8 mm	Base Number Matches：	1

HY5Y5A6DLF-HF 数据手册

Preliminary

HY5Y5A6DF-xF

4Banks x 4M x 16bits Synchronous DRAM

DESCRIPTION

The Hynix Low Power SDRAM is suited for non-PC application which use the batteries such as PDAs,

2.5G and 3G cellular phones with internet access and multimedia capabilities, mini-notebook, handheld

PCs.

The Hynix HY5Y5A6DF is a 268,435,456bit CMOS Synchronous Dynamic Random Access Memory. It

is organized as 4banks of 4,194,304x16.

The Low Power SDRAM provides for programmable options including CAS latency of 1, 2, or 3, READ

or WRITE burst length of 1, 2, 4, 8, or full page, and the burst count sequence(sequential or interleave).

And the Low Power SDRAM also provides for special programmable options including Partial Array Self

Refresh of a quarter bank, a half bank, 1bank, 2banks, or all banks, Temperature Compensated Self

Refresh of 15, 45, 70, or 85 degrees C. A burst of Read or Write cycles in progress can be terminated

by a burst terminate command or can be interrupted and replaced by a new burst Read or Write com-

mand on any cycle(This pipelined design is not restricted by a 2N rule).

Deep Power Down Mode is a additional operating mode for Low Power SDRAM. This mode can achieve

maximum power reduction by removing power to the memory array within each SDRAM. By using this

feature, the system can cut off alomost all DRAM power without adding the cost of a power switch and

giving up mother-board power-line layout flexibility.

FEATURES

•

Standard SDRAM Protocol

Internal 4bank operation

Voltage : VDD = 3.0V & 3.3V, VDDQ = 3.0V & 3.3V

LVCMOS compatible I/O Interface

Low Voltage interface to reduce I/O power

Low Power Features

- PASR(Partial Array Self Refresh)

- TCSR(Temperature Compensated Self Refresh)

- DS(Drive Strength)

- Deep Power Down Mode

•

CAS latency of 1, 2, or 3

Packages : 54ball, 0.8mm pitch FBGA

-25 ~ 70C Operation

ORDERING INFORMATION

Clock

Frequency Latency

CAS

Part Number

Organization

Interface

Package

54ball

FBGA

HY5Y5A6D(L/S)F-HF

133MHz

4banks x 4Mb x 16

LVCMOS

This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for

use of circuits described. No patent licenses are implied.

Rev. 0.3 / Aug. 2003

12 3 4 5 6 7...23

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与HY5Y5A6DLF-HF相关器件

型号	品牌	获取价格	描述	数据表
HY5Y5A6DLF-PF	HYNIX	获取价格	Synchronous DRAM, 16MX16, 7ns, CMOS, PBGA54
HY5Y5A6DLFP-HF	HYNIX	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 0.80 MM PITCH, LEAD FREE, FBGA-54
HY5Y5A6DLF-SF	HYNIX	获取价格	Synchronous DRAM, 16MX16, 7ns, CMOS, PBGA54
HY5Y5A6DSF-HF	HYNIX	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 0.80 MM PITCH, FBGA-54
HY5Y5A6DSFP-HF	HYNIX	获取价格	Synchronous DRAM, 16MX16, 5.4ns, CMOS, PBGA54, 0.80 MM PITCH, LEAD FREE, FBGA-54
HY5Y5A6DSF-SF	HYNIX	获取价格	Synchronous DRAM, 16MX16, 7ns, CMOS, PBGA54
HY5Y6B6DLF-HF	HYNIX	获取价格	4Banks x1M x 16bits Synchronous DRAM
HY5Y6B6DLF-PF	HYNIX	获取价格	4Banks x1M x 16bits Synchronous DRAM
HY5Y6B6DLFP-HF	HYNIX	获取价格	4Banks x1M x 16bits Synchronous DRAM
HY5Y6B6DLFP-PF	HYNIX	获取价格	4Banks x1M x 16bits Synchronous DRAM

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