Datasheet > HSP50307SC

HSP50307SC

更新时间： 2024-11-14 22:36:03

品牌	Logo	应用领域
英特矽尔 - INTERSIL		/
页数	文件大小	规格书
8页	52K
描述
Burst QPSK Modulator

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中文翻译

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数据手册

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HSP50307SC 数据手册

HSP50307

Burst QPSK Modulator

December 1996

Features

Description

• 256 KBPS Data Rate and 128 KBPS Baud Rate

• Burst QPSK Modulation

The HSP50307 is a mixed signal burst QPSK Modulator for

upstream CATV Applications. The HSP50307 demultiplexes

and modulates a serial data stream onto an RF Carrier cen-

tered between 8 and 15MHz. The signal spectrum is shaped

with α = 0.5 root raised cosine (RRC) digital ﬁlters. On-chip ﬁl-

tering limits spurs and harmonics to levels below -35dBc dur-

ing transmissions. The output power level is adjustable over a

40dB range in 1dB steps. The maximum differential output

level is +62dBmV into 75Ω. A transmitter inhibit function dis-

ables the RF output outside the burst interval. The differential

output ampliﬁer int7-erfaces to the cable via a transformer.

• Programmable Carrier Frequency from 8MHz to

15MHz With a Frequency Step Size of 32kHz

• α = 0.5 Root Raised Cosine (RRC) Filtering For Spec-

trum Shaping

• On-Board Synthesizer

• Programmable Output Level From 22 to 62dBmV in

1dB Steps

The Block Diagram of the HSP50307 QPSK Modulator is

shown below. The HSP50307 consists of a digital control

interface, an I/Q generator, a synthesizer, and a quadrature

modulator.

• Programmable Charge Pump Current Control

• 62dBmV Differential Output Driver for 75Ω Cable

The data clock is derived from the master clock. The

HSP50307 demultiplexes the input data bits into in-phase (I)

and quadrature (Q) data streams. The ﬁrst bit and subsequent

alternating bits of the burst are in-phase data. The two data

streams are ﬁltered, converted from digital to analog, and low

pass ﬁltered to produce the baseband I and Q analog signals.

Applications

• Burst QPSK Modulator

• HSP50307EVAL1 Evaluation Board Is Available

Ordering Information

The baseband signals are up-converted to RF in the Quadra-

ture Modulation Section. The synthesizer provides the local

oscillator (LO) for the quadrature modulator. The frequency is

programmable via the control interface with a resolution of

32kHz. The output of the quadrature modulator is low pass ﬁl-

tered to remove harmonic distortion.

TEMP.

RANGE ( C)

PKG.

NO.

PART NUMBER

PACKAGE

HSP50307SC

0 to 70

28 Ld SOIC

M28.3

Block Diagram

RCLK VCO_IN VCO_SET PD_OUT

RESET

†

QUADRATURE

MODULATOR

CCLK

C_EN

CONTROL

INTERFACE

†

QUAD

GEN

SYNTHESIZER

CDATA

TX_EN

I/Q GENERATOR

†

MOD_OUT-

MOD_OUT+

8RRC

D/A

LPF

TX_DATA

LPF

PGA

8RRC

TX_EN

TXCLK

MCLK

/100

DAC_REF

VCM_REF

† Indicates analog circuitry.

MCLK MUST ALWAYS BE PRESENT FOR PROPER OPERATION

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

File Number 4219

7-68

12 3 4 5 6 7 8

中文翻译

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