HSP45116A
Data Sheet
April 1999
File Number 4156.3
Numerically Controlled Oscillator/
Modulator
Features
• NCO and CMAC on One Chip
The Intersil HSP45116A combines a high performance
quadrature numerically controlled oscillator (NCO) and a
high speed 16-bit Complex Multiplier/Accumulator (CMAC)
on a single IC. This combination of functions allows a
complex vector to be multiplied by the internally generated
(cos, sin) vector for quadrature modulation and
• 52MHz Version
• 32-Bit Frequency Control
• 16-Bit Phase Modulation
• 16-Bit CMAC
demodulation. As shown in the Block Diagram, the
HSP45116A is divided into three main sections. The Phase/
Frequency Control Section (PFCS) and the Sine/Cosine
Section together form a complex NCO. The CMAC multiplies
the output of the Sine/ Cosine Section with an external
complex vector.
• 0.013Hz Tuning Resolution at 52MHz
• Programmable Rounding Option
• Spurious Frequency Components < -90dBc
• Fully Static CMOS
The inputs to the Phase/Frequency Control Section consist
of a microprocessor interface and individual control lines.
The phase resolution of the PFCS is 32 bits, which results in
frequency resolution better than 0.013Hz at 52MHz. The
output of the PFCS is the argument of the sine and cosine.
The spurious free dynamic range of the complex sinusoid is
greater than 90dBc.
Applications
• Frequency Synthesis
• Modulation - AM, FM, PSK, FSK, QAM
• Demodulation, PLL
The output vector from the Sine/Cosine Section is one of the
inputs to the Complex Multiplier/Accumulator. The CMAC
multiplies this (cos, sin) vector by an external complex vector
and can accumulate the result. The resulting complex vectors
are available through two 20-bit output ports which maintain
the 90dB spectral purity. This result can be accumulated
internally to implement an accumulate and dump filter.
• Phase Shifter
• Polar to Cartesian Conversions
Ordering Information
TEMP.
o
PART NUMBER RANGE ( C)
PACKAGE
PKG. NO.
A quadrature down converter can be implemented by
loading a center frequency into the Phase/Frequency
Control Section. The signal to be down converted is the
Vector Input of the CMAC, which multiplies the data by the
rotating vector from the Sine/Cosine Section. The resulting
complex output is the down converted signal. The bit
position and widths for the outputs of CMAC and Complex
Accumulator (ACC) are programmable.
HSP45116AVC-52
0 to 70
160 Ld MQFP Q160.28x28
Block Diagram
VECTOR INPUT
I
R
SINE/
COSINE
ARGUMENT
MICROPROCESSOR
PHASE/
SIN
COS
INTERFACE
SINE/
COSINE
SECTION
FREQUENCY
CONTROL
SECTION
CMAC
INDIVIDUAL
CONTROL SIGNALS
R
I
VECTOR OUTPUT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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