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HMC4069 PDF预览

HMC4069

更新时间: 2023-12-20 18:45:57
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 1512K
描述
2.9 GHz整数N分频频率合成器(N = 2 - 32)

HMC4069 数据手册

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HMC4069LP4E  
v02.0316  
2.9 GHz INTEGER-N SYNTHESIZER  
(N = 2 - 32)  
PFD Functionality  
The phase frequency detector functionality of the HMC4069LP4E is such that it compares the rising edge the two  
input signals (REF / VCO). This information is then used to pulse the ND and NU outputs depending upon which  
input signal is greater in frequency.  
Under normal operation the ND pin will be active when VCO frequency is greater than the REF frequency; NU would  
remain constant. Conversly, when the VCO frequency is lower than the REF frequency, then NU would be active  
and ND would remain constant. Here, the term “active” means that the output will on average, vary between 3 - 5V,  
and the term “remain constant” means that the output will remain at approximately 5V.  
INVERT Functionality  
The INV pin effectively swaps the REF and VCO input signals, such that the NU and ND pin responses are  
swapped. This has the advantage of easily correcting a layout issue if the loop filter op-amp inputs were swapped.  
A logic “LOW” on this pin will configure the device for normal operation, and a logic “HIGH” cause the input signals  
to swap. The evaluation board has a 10kΩ resistor pull up resistor to 5V. A jumper must be installed connecting the  
INV pin to ground for normal operation.  
Lock Detect Functionality  
The LD pin is an open collector pulsed output transistor. It requires an external 1k pull up resistor to Vcc (5V), as  
well as a simple RC filter.  
Since the pin will produce very narrow pulses at each zero crossing of the REF and VCO input signals, filtering is  
necessary to create an average voltage which can be used to drive an LED or system input logic. When the device  
is “LOCKED”, that transistor will effectively be “OFF”, and the filtered output voltage will be “HIGH”.  
Below is an example of an RC filter for the lock detect pin. The value of resistor “R” should be greater than 100Ω  
to limit any surge current from flowing when the output transistor is “ON”. The value of capacitor “C” should be  
selected such that the filter cutoff is much less than the REF frequency, but not excessively large (slow) that it will  
inhibit detection of lock status.  
For price, delivery, and to place orders: Analog Devices, Inc., One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106  
Phone: 781-329-4700 • Order online at www.analog.com  
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Application Support: Phone: 1-800-ANALOG-D  

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