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HM1-65162C/883 PDF预览

HM1-65162C/883

更新时间： 2024-11-15 22:11:35
品牌 Logo 应用领域
英特矽尔 - INTERSIL 内存集成电路静态存储器输出元件输入元件双倍数据速率
页数 文件大小 规格书
9页 206K
描述
2K x 8 Asynchronous CMOS Static RAM

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中文翻译

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HM1-65162C/883 数据手册

 浏览型号HM1-65162C/883的Datasheet PDF文件第2页浏览型号HM1-65162C/883的Datasheet PDF文件第3页浏览型号HM1-65162C/883的Datasheet PDF文件第4页浏览型号HM1-65162C/883的Datasheet PDF文件第5页浏览型号HM1-65162C/883的Datasheet PDF文件第6页浏览型号HM1-65162C/883的Datasheet PDF文件第7页 
TM  
HM-65162/883  
2K x 8 Asynchronous  
CMOS Static RAM  
March 1997  
Features  
Description  
• This Circuit is Processed in Accordance to MIL-STD-  
883 and is Fully Conformant Under the Provisions of  
Paragraph 1.2.1.  
The HM-65162/883 is a CMOS 2048 x 8 Static Random  
Access Memory manufactured using the Intersil Advanced  
SAJI V process. The device utilizes asynchronous circuit  
design for fast cycle time and ease of use. The pinout is the  
JEDEC 24 pin DIP, and 32 pad 8-bit wide standard which  
allows easy memory board layouts flexible to accommodate  
• Fast Access Time . . . . . . . . . . . . . . . . . . . 70/90ns Max  
• Low Standby Current. . . . . . . . . . . . . . . . . . . .50µA Max  
• Low Operating Current . . . . . . . . . . . . . . . . . 70mA Max a variety of industry standard PROMs, RAMs, ROMs and  
EPROMs. The HM-65162/883 is ideally suited for use in  
microprocessor based systems with its 8-bit word length  
organization. The convenient output enable also simplifies  
• Data Retention at 2.0V. . . . . . . . . . . . . . . . . . .20µA Max  
• TTL Compatible Inputs and Outputs  
the bus interface by allowing the data outputs to be con-  
trolled independent of the chip enable. Gated inputs lower  
operating current and also eliminate the need for pull-up or  
pull-down resistors.  
• JEDEC Approved Pinout (2716, 6116 Type)  
• No Clocks or Strobes Required  
o
o
• Wide Temperature Range . . . . . . . . . . -55 C to +125 C  
• Equal Cycle and Access Time  
• Single 5V Supply  
• Gated Inputs  
- No Pull-Up or Pull-Down Resistors Required  
Ordering Information  
70ns/20µA  
HM1-65162B/883  
HM4-65162B/883  
90ns/40µA  
HM1-65162/883  
HM4-65162/883  
90ns/300µA  
TEMP. RANGE  
PACKAGE  
CERDIP  
CLCC  
PKG. NO.  
o
o
HM1-65162C/883  
-
-55 C to 125 C  
F24.6  
J32.A  
o
o
-55 C to 125 C  
Pinouts  
HM-65162/883 (CERDIP)  
HM-65162/883 (CLCC)  
TOP VIEW  
TOP VIEW  
PIN  
DESCRIPTION  
No Connect  
A7  
A6  
1
2
3
4
5
6
7
8
9
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
VCC  
A8  
1
4
3
2
32 31 30  
NC  
29  
28  
27  
26  
25  
24  
23  
22  
21  
5
6
A8  
A9  
NC  
A6  
A5  
A5  
A9  
A0 - A10  
E
Address Input  
A4  
W
7
8
A4  
A3  
Chip Enable/Power Down  
Ground  
A3  
G
W
G
VSS/GND  
A2  
A10  
E
9
A2  
A1  
DQ0 - DQ7 Data In/Data Out  
10  
11  
12  
13  
A1  
A10  
E
A0  
DQ7  
DQ6  
DQ5  
DQ4  
DQ3  
VCC  
W
Power (+5V)  
Write Enable  
Output Enable  
DQ0  
A0  
DQ1 10  
DQ2  
NC  
DQ0  
DQ7  
DQ6  
11  
GND 12  
G
14  
15 16 17 18 19 20  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a trademark of Intersil Americas Inc.  
FN3001.1  
Copyright © Intersil Americas Inc. 2002. All Rights Reserved  
188  
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中文翻译

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与HM1-65162C/883相关器件

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HM1-65162C-2 TEMIC

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 		Standard SRAM, 2KX8, 85ns, CMOS, CDIP24,
HM1-65162C-2/883 TEMIC

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 		Standard SRAM, 2KX8, 85ns, CMOS, CDIP24, 0.600 INCH, CERAMIC, DIP-24
HM1-65162C-2/883:D TEMIC

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 		Standard SRAM, 2KX8, 85ns, CMOS, CDIP24, 0.600 INCH, CERAMIC, DIP-24
HM1-65162C-2:D TEMIC

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 		Standard SRAM, 2KX8, 85ns, CMOS, CDIP24,
HM1-65162C-5 TEMIC

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 		Standard SRAM, 2KX8, 70ns, CMOS, CDIP24,
HM1-65162C-5+ TEMIC

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 		Standard SRAM, 2KX8, 70ns, CMOS, CDIP24,
HM1-65162C-8 ETC

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 		x8 SRAM
HM1-65162C-9 INTERSIL

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 		2K x 8 Asynchronous CMOS Static RAM
HM1-65162C-9 TEMIC

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 		Standard SRAM, 2KX8, 85ns, CMOS, CDIP24, 0.600 INCH, CERAMIC, DIP-24
HM1-65162C-9:D TEMIC

获取价格

 		Standard SRAM, 2KX8, 85ns, CMOS, CDIP24,

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