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HIP6501A PDF预览

HIP6501A

更新时间: 2024-01-23 09:24:10
品牌 Logo 应用领域
英特矽尔 - INTERSIL 控制器
页数 文件大小 规格书
14页 143K
描述
Triple Linear Power Controller with ACPI Control Interface

HIP6501A 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP, SOP16,.25
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.43可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.9 mm
湿度敏感等级:3信道数量:3
功能数量:1端子数量:16
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:5,12 V认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Power Management Circuits
最大供电电压 (Vsup):5.25 V最小供电电压 (Vsup):4.75 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:COMMERCIAL
端子面层:Matte Tin (Sn) - annealed端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.9 mm
Base Number Matches:1

HIP6501A 数据手册

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HIP6501A  
Data Sheet  
February 2000  
File Number 4749.2  
Triple Linear Power Controller with ACPI  
Control Interface  
Features  
• Provides 3 ACPI-Controlled Voltages  
The HIP6501A, paired with either the HIP6020 or HIP6021,  
simplifies the implementation of ACPI-compliant designs in  
microprocessor and computer applications. The IC  
integrates two linear controllers and a low-current pass  
transistor, as well as the monitoring and control functions  
into a 16-pin SOIC package. One linear controller generates  
- 5V Active/Sleep (5V  
DUAL  
)
- 3.3V Active/Sleep (3.3V  
)
DUAL  
- 2.5V/3.3V Active/Sleep (2.5V  
)
MEM  
• Simple Control Design - No Compensation Required  
• Excellent Output Voltage Regulation  
the 3.3V  
voltage plane from an ATX power supply’s  
- 3.3V  
DUAL  
States Only  
Output: ±2.0% Over Temperature; Sleep  
DUAL  
5VSB output during sleep states (S3, S4/S5), powering the  
PCI slots through an external pass transistor, as instructed  
- 2.5V/3.3V Output: ±2.0% Over Temperature; Both  
by the status of the 3.3V  
enable pin. An additional pass  
Operational States (3.3V setting in sleep only)  
DUAL  
transistor is used to switch in the ATX 3.3V output for PCI  
operation during S0 and S1 (active) operatingstates. The  
second linear controller supplies the computer system’s  
2.5V/3.3V memory power through an external pass  
transistor in active states. During S3 state, an integrated  
pass transistor supplies the 2.5V/3.3V sleep-state power. A  
• Fixed Output Voltages Require No Precision External  
Resistors  
• Small Size  
- Small External Component Count  
• Selectable 2.5V  
MEM  
Output Voltage Via FAULT/MSEL Pin  
third controller powers up a 5V  
plane by switching in  
DUAL  
- 2.5V for RDRAM Memory  
- 3.3V for SDRAM Memory  
the ATX 5V output in active states, or the ATX 5VSB in sleep  
states.  
• Under-Voltage Monitoring of All Outputs with Centralized  
FAULT Reporting  
The HIP6501A’s operating mode (active-state outputs or  
sleep-state outputs) is selectable through two control pins:  
S3 and S5. Further control of the logic governing activation  
of different power modes is offered through two enabling  
• Adjustable Soft-Start Function Eliminates 5VSB  
Perturbations  
pins: EN3VDL and EN5VDL. In active states, the 3.3V  
DUAL  
Pinout  
linear regulator uses an external N-Channel pass MOSFET  
to connect the output (V ) directly to the 3.3V input  
HIP6501A (SOIC)  
OUT1  
supplied by an ATX (or equivalent) power supply, while  
incurring minimal losses. In sleep state, the 3.3V output  
TOP VIEW  
DUAL  
16  
1
2
3
4
5
6
7
8
VSEN2  
5VSB  
EN3VDL  
3V3DLSB  
is supplied from the ATX 5VSB through an NPN transistor,  
also external to the controller. Active state power delivery for  
15 DRV2  
14  
12V  
the 2.5/3.3V  
output is done through an external NPN  
MEM  
13  
SS  
3V3DL  
transistor, or an NMOS switch for the 3.3V setting. In sleep  
states, conduction on this output is transferred to an internal  
12 5VDL  
EN5VDL  
S3  
5VDLSB  
11  
10  
9
pass transistor. The 5V  
output is powered through two  
DUAL  
DLA  
S5  
external MOS transistors. In sleep states, a PMOS (or PNP)  
transistor conducts the current from the ATX 5VSB output,  
while in active states, current flow is transferred to an NMOS  
transistor connected to the ATX 5V output. Similar to the  
GND  
FAULT/MSEL  
3.3V  
output, the operation of the 5V output is  
DUAL  
DUAL  
dictated not only by the status of the S3 and S5 pins, but that  
of the EN5VDL pin as well.  
Ordering Information  
TEMP.  
PKG.  
NO.  
o
PART NUMBER RANGE ( C)  
PACKAGE  
16 Ld SOIC  
HIP6501ACB  
0 to 70  
M16.15  
HIP6501EVAL1  
Evaluation Board  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 2000  
1

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