Datasheet > HIP6502B

HIP6502B

更新时间： 2024-02-25 16:54:23

品牌	Logo	应用领域
英特矽尔 - INTERSIL		控制器
页数	文件大小	规格书
14页	151K
描述
Multiple Linear Power Controller with ACPI Control Interface

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HIP6502B 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	SOIC	包装说明：	PLASTIC, MS-013-AC, SOIC-20
针数：	20	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.76	可调阈值：	NO
模拟集成电路 - 其他类型：	POWER SUPPLY SUPPORT CIRCUIT	JESD-30 代码：	R-PDSO-G20
JESD-609代码：	e0	长度：	12.8 mm
信道数量：	9	功能数量：	1
端子数量：	20	最高工作温度：	70 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP20,.4
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	5 V
认证状态：	Not Qualified	座面最大高度：	2.65 mm
子类别：	Power Management Circuits	最大供电电压 (Vsup)：	5.25 V
最小供电电压 (Vsup)：	4.75 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	BIPOLAR
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	7.5 mm	Base Number Matches：	1

HIP6502B 数据手册

HIP6502B

Data Sheet

May 2000

File Number 4871

Multiple Linear Power Controller with

ACPI Control Interface

Features

• Provides 5 ACPI-Controlled Voltages

- 5V USB/Keyboard/Mouse (Active/Sleep)

The HIP6502B complements either an HIP6020 or an

HIP6021 in ACPI-compliant designs for microprocessor and

computer applications. The IC integrates four linear

controllers/regulators, switching, monitoring and control

functions into a 20-pin SOIC package. One linear controller

DUAL

- 3.3V

- 2.5V

- 3.3V

- 2.5V

/3.3V PCI/Auxiliary/LAN (Active/Sleep)

RDRAM (Active/Sleep)

SDRAM (Active/Sleep)

DUAL

MEM

Clock/Processor Terminations (Active Only)

CLK

generates the 3.3V

/3.3V voltage plane from the ATX

DUAL

• Excellent Output Voltage Regulation

- 3.3V /3.3V Output: ±2.0% Over Temperature;

supply’s 5VSB output, powering the south bridge and the

PCI slots through an external pass transistor during sleep

states (S3, S4/S5). A second transistor is used to switch in

the ATX 3.3V output for operation during S0 and S1/S2

(active) operating states. Two linear controllers/regulators

supply at choice either or both of the computer system’s

2.5V or 3.3V memory power through external pass

DUAL SB

Sleep State Only

- 2.5V and 3.3V

Output: ±2.0% Over

MEM

Temperature; Both Operational States (3.3V

Sleep Only)

MEM

- 2.5V

Output: ±2.0% Over Temperature

CLK

transistors in active states. During sleep states, integrated

pass transistors supply the sleep power. Another controller

• Small Size

- Very Low External Component Count

powers up the 5V

plane by switching in the ATX 5V

DUAL

• Dual Memory Voltage Support Via MSEL Pin

- 2.5V for RDRAM Memory

output in active states, and the ATX 5VSB in sleep states.

One internal regulator outputs a dedicated, noise-free 2.5V

clock chip supply. The HIP6502B’s operating mode (active

outputs or sleep outputs) is selectable through two digital

control pins, S3 and S5. Enabling sleep state support on the

- 3.3V for SDRAM Memory

- Both 2.5V and 3.3V for Flexible Systems

• Under-Voltage Monitoring of All Outputs with Centralized

FAULT Reporting and Temperature Shutdown

output is offered through the EN5VDL pin. In active

DUAL

state, the 3.3V

and 3.3V

linear regulators use

DUAL

MEM

external N-channel pass MOSFETs to connect the outputs

directly to the 3.3V input supplied by an ATX (or equivalent)

power supply, for minimal losses. In sleep state, power

delivery on both outputs is transferred to NPN transistors -

Applications

•

Motherboard Power Regulation for ACPI-Compliant

Computers

external to the controller on the 3.3V

, internal on the

DUAL

Pinout

3.3V

. Active state regulation on the 2.5V output is

MEM

HIP6502B

(SOIC)

TOP VIEW

performed through an external NPN transistor. In sleep

state, conduction on this output is transferred to an internal

pass transistor. The 5V

output is powered through two

DUAL

external MOS transistors. In sleep states, a PMOS (or PNP)

transistor conducts the current from the ATX 5VSB output;

while in active state, current ﬂow is transferred to an NMOS

transistor connected to the ATX 5V output. The operation of

MSEL

VSEN2

5VSB

19 DRV2

VSEN1

the 5V

output is dictated not only by the status of the

12V

3V3DLSB

3V3DL

VCLK

DUAL

S3 and S5 pins, but that of the EN5VDL pin as well. The

3.3V /3.3V output is active for as long as the ATX

16 SS

5VDL

DUAL SB

5VSB voltage is applied to the chip. The 2.5V

output is

CLK

5VDLSB

3V3

only active during S0 and S1/S2, and uses the 3V3 pin as

input source for its internal pass element.

EN5VDL

13 DLA

FAULT

GND

Ordering Information

TEMP.

PKG.

NO.

PART NUMBER RANGE ( C)

PACKAGE

20 Ld SOIC

HIP6502BCB

0 to 70

M20.3

HIP6502BEVAL1

Evaluation Board

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

12 3 4 5 6 7...14

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与HIP6502B相关器件

型号	品牌	描述	获取价格	数据表
HIP6502BCB	INTERSIL	Multiple Linear Power Controller with ACPI Control Interface	获取价格
HIP6502BCB-T	RENESAS	SWITCHING CONTROLLER, PDSO20, PLASTIC, MS-013AC, SOIC-20	获取价格
HIP6502BEVAL1	INTERSIL	Multiple Linear Power Controller with ACPI Control Interface	获取价格
HIP6502CB	INTERSIL	Multiple Linear Power Controller with ACPI Control Interface	获取价格
HIP6502EVAL1	INTERSIL	Multiple Linear Power Controller with ACPI Control Interface	获取价格
HIP6503	INTERSIL	Multiple Linear Power Controller with ACPI Control Interface	获取价格

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