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HCTS574DMSR PDF预览

HCTS574DMSR

更新时间： 2024-11-02 22:55:03
品牌 Logo 应用领域
英特矽尔 - INTERSIL 触发器
页数 文件大小 规格书
11页 137K
描述
Radiation Hardened Octal D-Type Flip-Flop, Three-State, Positive Edge Triggered

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HCTS574DMSR 数据手册

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HCTS574MS  
Radiation Hardened Octal D-Type  
Flip-Flop, Three-State, Positive Edge Triggered  
August 1995  
Features  
Pinouts  
20 LEAD CERAMIC DUAL-IN-LINE  
METAL SEAL PACKAGE (SBDIP)  
MIL-STD-1835 CDIP2-T20  
• 3 Micron Radiation Hardened CMOS SOS  
• Total Dose 200K RAD (Si)  
• SEP Effective LET No Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/Bit-  
Day (Typ)  
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse  
• Latch-Up Free Under Any Conditions  
• Fanout (Over Temperature Range)  
- Bus Driver O11utputs - 15 LSTTL Loads  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
• LSTTL Input Compatibility  
TOP VIEW  
1
2
3
4
5
6
7
8
9
VCC  
Q0  
OE  
D0  
D1  
D2  
D3  
D4  
D5  
D6  
D7  
20  
19  
18 Q1  
17 Q2  
16 Q3  
15 Q4  
14 Q5  
13 Q6  
12  
Q7  
GND 10  
11 CP  
- VIL = 0.8V Max  
- VIH = VCC/2 Min  
• Input Current Levels Ii ≤ 5µA at VOL, VOH  
20 LEAD CERAMIC METAL SEAL  
FLATPACK PACKAGE (FLATPACK)  
MIL-STD-1835 CDFP4-F20  
TOP VIEW  
Description  
The Intersil HCTS574MS is a Radiation Hardened non-inverting  
octal D-type, positive edge triggered flip-flop with three-stateable  
outputs. The HCTS574MS utilizes advanced CMOS/SOS  
technology. The eight flip-flops enter data into their registers on  
the LOW-to-HIGH transition of the clock (CP). Data is also  
transferred to the outputs during this transition. The output  
enable (OE) controls the three-state outputs and is independent  
of the register operation. When the output enable is high, the  
outputs are in the high impedance state.  
OE  
D0  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
VCC  
Q0  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
CP  
D1  
D2  
Q3  
Q4  
D5  
D6  
The HCTS574MS utilizes advanced CMOS/SOS technology to  
achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
Q7  
GND  
The HCTS574MS is supplied in a 20 lead Ceramic flatpack  
(K suffix) or a SBDIP Package (D suffix).  
Ordering Information  
PART NUMBER  
HCTS574DMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
o
o
-55 C to +125 C  
20 Lead SBDIP  
o
o
HCTS574KMSR  
-55 C to +125 C  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
HCTS574D/Sample  
HCTS574K/Sample  
HCTS574HMSR  
+25 C  
o
+25 C  
Sample  
20 Lead Ceramic Flatpack  
Die  
o
+25 C  
Die  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518629  
File Number 2359.2  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
694  
1234567...11

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