Datasheet > HCTS7266MS

HCTS7266MS

更新时间： 2024-11-02 22:55:03

品牌	Logo	应用领域
英特矽尔 - INTERSIL		栅
页数	文件大小	规格书
8页	137K
描述
Radiation Hardened Quad 2-Input Exclusive NOR Gate

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中文翻译

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数据手册

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HCTS7266MS 数据手册

HCTS7266MS

Radiation Hardened

Quad 2-Input Exclusive NOR Gate

August 1995

Features

Pinouts

14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL

PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14

TOP VIEW

• 3 Micron Radiation Hardened CMOS SOS

• Total Dose 200K RAD (Si)

• SEP Effective LET No Upsets: >100 MEV-cm²/mg

14 VCC

13 B4

12 A4

11 Y4

10 Y3

• Single Event Upset (SEU) Immunity < 2 x 10^-9Errors/Bit-Day

(Typ)

• Dose Rate Survivability: >1 x 10¹²RAD (Si)/s

• Dose Rate Upset >10¹⁰RAD (Si)/s 20ns Pulse

• Latch-Up Free Under Any Conditions

• Military Temperature Range: -55^oC to +125^oC

• Signiﬁcant Power Reduction Compared to LSTTL ICs

• DC Operating Voltage Range: 4.5V to 5.5V

GND

• LSTTL Input Compatibility

- VIL = 0.8V Max

14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE

(FLATPACK) MIL-STD-1835 CDFP3-F14

TOP VIEW

- VIH = 2.0V Min

• Input Current Levels Ii ≤ 5µA at VOL, VOH

VCC

Description

The Intersil HCTS7266MS is a Radiation Hardened quad 2-Input

exclusive NOR Gate. A logic level high on either one of the inputs

(A or B) will force the output (y) low. A high on both inputs, or a low

on both inputs will force the output to a logic high.

The HCTS7266MS utilizes advanced CMOS/SOS technology to

achieve high-speed operation. This device is a member of radia-

tion hardened, high-speed, CMOS/SOS Logic Family with TTL

input compatibility.

GND

The HCTS7266MS is supplied in a 14 lead Ceramic ﬂatpack Functional Diagram

(K sufﬁx) or a SBDIP Package (D sufﬁx).

Ordering Information

PART

NUMBER

TEMPERATURE SCREENING

RANGE LEVEL

PACKAGE

HCTS7266DMSR

-55 C to +125 C Intersil Class

S Equivalent

14 Lead

SBDIP

HCTS7266KMSR

-55 C to +125 C Intersil Class

S Equivalent

14 Lead

Ceramic

Flatpack

TRUTH TABLE

INPUTS

OUTPUTS

HCTS7266D/

Sample

+25 C

Sample

14 Lead

SBDIP

HCTS7266K/

Sample

+25 C

14 Lead

Ceramic

Flatpack

HCTS7266HMSR

+25 C

Die

NOTE: L = Logic Level Low, H = Logic level High

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

Spec Number 518627

File Number 3384.1

12 3 4 5 6 7 8

中文翻译

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与HCTS7266MS相关器件

型号	品牌	获取价格	描述	数据表
HCTS74D	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74DMSH	RENESAS	获取价格	IC,FLIP-FLOP,DUAL,D TYPE,CMOS, RAD HARD,DIP,14PIN,CERAMIC
HCTS74DMSR	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74DTR	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74HMSR	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74K	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74KMSH	RENESAS	获取价格	D Flip-Flop, HCT Series, 2-Func, Positive Edge Triggered, 1-Bit, Complementary Output, CMO
HCTS74KMSR	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74KTR	INTERSIL	获取价格	Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCTS74KTR	RENESAS	获取价格	HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14, CERAMI

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