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HCTS190MS

更新时间： 2024-11-01 22:55:03
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英特矽尔 - INTERSIL 计数器
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Radiation Hardened Synchronous 4-Bit Up/Down Counter

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HCTS190MS 数据手册

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HCTS190MS  
Radiation Hardened  
Synchronous 4-Bit Up/Down Counter  
September 1995  
Features  
Description  
• 3 Micron Radiation Hardened CMOS SOS  
The Intersil HCTS190MS is an asynchronously presettable  
BCD Decade synchronous counter. Presetting the counter to  
the number on the preset data inputs (P0 - P3) is accom-  
plished by a low on the parallel load input (PL). Counting  
occurs when (PL) is high, Count Enable (CE) is low and the  
Up/Down (U/D) input is either low for up-counting or high for  
down-counting. The counter is incremented or decremented  
synchronously with the low-to-high transition of the clock.  
• Total Dose 200K RAD (Si)  
• SEP Effective LET No Upsets: >100 MEV-cm2/mg  
• Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/  
Bit-Day (Typ)  
• Dose Rate Survivability: >1 x 1012 RAD (Si)/s  
• Dose Rate Upset >1010 RAD (Si)/s 20ns Pulse  
• Latch-Up Free Under Any Conditions  
When an overflow or underflow of the counter occurs, the  
Terminal Count output (TC), which is low during counting,  
goes high and remains high for one clock cycle. This output  
can be used for look-ahead carry in high speed cascading.  
The TC output also initiates the Ripple Clock output (RC)  
which, normally high, goes low and remains low for the low-  
level portion of the clock pulse. These counter can be cas-  
caded using the Ripple Carry output.  
• Fanout (Over Temperature Range)  
- Standard Outputs - 10 LSTTL Loads  
• Military Temperature Range: -55oC to +125oC  
• Significant Power Reduction Compared to LSTTL ICs  
• DC Operating Voltage Range: 4.5V to 5.5V  
If the decade counter is preset to an illegal state or assumes  
an illegal state when power is applied, it will return to the  
normal sequence in one or two counts  
• LSTTL Input Compatibility  
- VIL = 0.8V Max  
The HCTS190MS utilizes advanced CMOS/SOS technology  
to achieve high-speed operation. This device is a member of  
radiation hardened, high-speed, CMOS/SOS Logic Family.  
- VIH = VCC/2 Min  
• Input Current Levels Ii ≤ 5µA @ VOL, VOH  
The HCTS190MS is supplied in a 16 lead Ceramic flatpack  
(K suffix) or a SBDIP Package (D suffix).  
Ordering Information  
PART NUMBER  
HCTS190DMSR  
TEMPERATURE RANGE  
SCREENING LEVEL  
Intersil Class S Equivalent  
Intersil Class S Equivalent  
Sample  
PACKAGE  
16 Lead SBDIP  
o
o
-55 C to +125 C  
o
o
HCTS190KMSR  
-55 C to +125 C  
16 Lead Ceramic Flatpack  
16 Lead SBDIP  
o
HCTS190D/Sample  
HCTS190K/Sample  
HCTS190HMSR  
+25 C  
o
+25 C  
Sample  
16 Lead Ceramic Flatpack  
Die  
o
+25 C  
Die  
Pinouts  
16 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE  
(SBDIP) MIL-STD-1835 CDIP2-T16, LEAD FINISH C  
TOP VIEW  
16 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE  
(FLATPACK) MIL-STD-1835 CDFP4-F16, LEAD FINISH C  
TOP VIEW  
VCC  
P0  
P1  
Q1  
16  
15  
14  
13  
1
2
3
4
5
6
7
8
VCC  
P0  
P1  
Q1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Q0  
CP  
Q0  
CP  
RC  
TC  
PL  
CE  
RC  
CE  
U/D  
Q2  
12 TC  
PL  
U/D  
Q2  
11  
10 P2  
P3  
P2  
Q3  
Q3  
P3  
GND  
GND  
9
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518614  
File Number 2474.2  
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999  
1
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HCTS191MS INTERSIL

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